Design of high light efficiency LCD projector based on FPGA

Publisher:SereneHarmonyLatest update time:2011-09-26 Source: 电子发烧友 Reading articles on mobile phones Scan QR code
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Introduction
Display technology is developing towards large screen, high definition, high brightness and high resolution. Generally speaking, the display with a diagonal size of more than 1 meter (40 inches) is called a large screen display. As an important display device, projectors have been widely used in finance, education, enterprises, military and other fields. Its large-format, high-definition multimedia presentation function makes the transmission of information more effective. At present, the mainstream products on the market are three-chip LCD projectors and DLP projectors, among which the market share of three-chip LCD projectors is as high as two-thirds.

However, the main buyers of projectors are mostly government departments, enterprises and universities. Whether it is a three-chip LCD projector or a DLP projector, its high price has always prevented projectors from entering ordinary households. In order to simplify the equipment structure and reduce costs, this paper presents a design method for a high-light-efficiency single-chip color LCD projector based on FPGA.

1 Projection Principle The general circuit principle of a three-chip LCD projector is shown in Figure 1. As can be seen from Figure 1, the circuit principle of a traditional LCD projector is to decode the transmitted video signal through color to generate R, G, and B signals, and then load the three primary color signals on the red, green, and blue monochrome LCD screens through the video processing circuit, and finally add them to the three monochrome projection tubes. After being restored by the three monochrome projection tubes, the image is magnified several dozen times through an optical lens and reflected to the screen by a reflector, and finally a color image is synthesized on the screen. It can be seen from this that since the three projection tubes and projection lenses are not all placed directly opposite the screen, the optical paths through which the three image signals are restored to the screen are different, which inevitably leads to the R, G, and B three-color signals not being able to completely overlap on the screen, thereby causing convergence distortion.

Therefore, starting from the video processing circuit and control circuit of Figure 1, this paper designs a new projection method, that is, presenting monochrome image data of the three primary colors of R, G, and B on a liquid crystal screen, and modulating the three monochromatic lights of R, G, and B that are irradiated, and then processed by the optical system such as transmission, refraction, and image widening, and finally forming a color network image on the screen. The schematic diagram of this method is shown in Figure 2.

As can be seen from Figure 2, the biggest feature of this design is that it displays the three primary color images of R, G, and B on one LCD screen respectively, and projects by modulating monochromatic light, unlike the traditional projection system, which uses three LCD screens to display the R, G, and B primary color images respectively.

2 Projector system circuit

In the design of the projector, the function of the control circuit is to process the input video and digital image signals to convert them into signals suitable for LCD screen display. The circuit part of the projection system is shown in Figure 3. When the image signal is transmitted from the DVI interface to the DVI decoding chip, the system can decompose the video signal into 24-bit R, G, B monochrome signals and corresponding control signals, and then perform relevant conversions through the video signal processing circuit composed of FPGA, and then restore it to DVI signal through the DVI encoding chip, and finally send it to the LCD screen.

As can be seen from the schematic diagram of the system circuit, the signal processing circuit with FPGA as the core (including DVI decoding and encoding chips) is the most critical part of the entire design. Figure 4 shows its data reading, writing and transmission schematic diagram. The data entering the FPGA from the DVI decoding chip includes 8-bit parallel R/G/B signals as well as line, field control signals and clock signals. In fact, in order to achieve real-time video display, one frame of data (the highest resolution supported by the LCD screen used by the author is XGA, i.e. 1024×768) should be processed. However, if the entire frame of data is processed together, at least 2 MB of external memory is required to cache the data, which not only increases the cost but also increases the complexity of the circuit. Therefore, in this design, the author adopts a new idea, that is, to process the input video data line by line, and use "ping-pong operation" in the data stream processing of two adjacent lines, which can achieve real-time display and simplify the circuit. The specific operation is as follows:

① Divide the FPGA's on-chip RAM into "RAM_A" and "RAM_B" through module calling;

② In the first line cycle, cache the first line of input data stream to "RAM_A": Because one line of video signal has 3K bytes, in order to achieve the separation of the three primary colors on the LCD screen, when storing data, it cannot be stored in the order in which the data enters the FPGA, but the red data should be stored in the 1st to 1024th storage units, the green data should be stored in the 1025th to 2048th storage units, and the blue data should be stored in the 2049th to 3072nd storage units, that is, the original pixels are "disordered" and stored;

③ In the second line cycle, the second line video signal is stored in "RAM_B" according to the method described in step ②, and the first line video signal stored in "RAM_A" is read out from the I/O port in sequence, and then encoded by the DVI encoding chip and sent to the LCD screen, that is, the data is read "in sequence";

④ Repeat steps ② and ③ to make the read and write operations alternate between "RAM_A" and "RAM_B" until one frame of data is transmitted.

At this time, the specific algorithm for displaying data on the LCD screen is shown in Figure 5, that is, R1,2 occupies the position of G1,1 (i.e. the second unit), R1,3 occupies the position of B1,1 (i.e. the third unit), R1,4 occupies the fourth unit, and so on, until 1024 red data are arranged on the LCD screen, then green data, and then blue data. In this way, the purpose of displaying R, G, and B images on an LCD screen can be achieved as shown in Figure 2.

The FPGA used in this design is the EP1C6Q240C8 from Altera's CvclONe series. The FPGA has an on-chip memory capacity of 90kbits, which is fully capable of processing the video signal with a resolution of XGA display mode. If you want to support a higher-resolution projection mode or process the entire frame of the image, you only need to replace the FPGA with a larger on-chip RAM resource or connect an external memory to the FPGA's I/O port. The DVI decoding and encoding chips are Sil161 and Sil164 respectively.

In addition to processing video signals for projectors, this FPGA-based controller can also be used for image flipping, interception, and pixel extraction in flat panel displays. The key to its operation is the control of data read and write addresses.

3 LCD screen processing and optical adjustment

The TFT liquid crystal panels on the market now all have color filters. If this design directly uses this liquid crystal panel, when the three monochromatic lights of R, G, and B are irradiated to the R, G, and B image areas respectively, the color filters will absorb a large part of the light energy, resulting in too low projection brightness to meet application requirements. Therefore, the liquid crystal panel used in this design needs to remove the color filter or a product without a color filter to improve light source utilization and projection brightness.

Since the video signal is divided into three parts, R, G, and B, on the LCD screen, the three primary color images converge through the liquid crystal panel to form a color image with the same height as the original image and compressed to one-third of the width. At this time, only a wide-screen lens is needed to widen the compressed image and restore it to a normal image.

4 Conclusion

With the popularization of the concept of home theater, more and more consumers want to enjoy the strong shock brought by big-budget movies at home. However, expensive projectors are prohibitive for many families. Starting from practical applications, this article designs a high-light-efficiency single-chip color LCD projection method based on FPGA. It is not difficult to see that this projection system will have the following advantages:

(1) Once industrialized, the cost of this new type of projector will be much lower than other LCD projectors, making it easy for ordinary households to adopt it;

(2) High integration, small size, large information capacity, and high speed;

(3) Light utilization is significantly improved, thereby improving display quality.

Reference address:Design of high light efficiency LCD projector based on FPGA

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