With the improvement of economic level, cars are gradually becoming people's daily means of transportation. However, the electronic products that people carry with them , such as mobile phones, cannot use the power supply in the car . Therefore, it has become a demand to develop an economical and practical car inverter.
We use the integrated pulse width modulation
chip
SG3525A as the main control chip, CD4020B counter and NAND gate
circuit
to form a frequency division and phase division circuit and equipped with a protection circuit to achieve the pulse width modulation of the inverter. Its continuous output power is 100W when the inverter power supply is working, and it has output overcurrent protection and input undervoltage protection functions, which can realize power supply inversion,
voltage
stability, undervoltage protection and overcurrent protection functions.
System Basics
The input of this inverter is the car battery (+12V, 4.5Ah), and the output is the industrial frequency square wave voltage (50Hz, 220V). The main circuit and control circuit block diagram of the system are shown in Figure 1. It adopts a typical two-stage conversion, namely DC/DC conversion and DC/AC inversion. The 12V DC voltage is inverted into a high-frequency square wave through push -pull conversion, and then boosted by a high-frequency boost transformer, and then rectified and filtered to obtain a stable DC voltage of about 320V; then the stable DC voltage is inverted into a square wave voltage with an effective value slightly greater than 220V by bridge conversion in the form of square wave inversion to drive the load. To ensure the reliable operation of the system, the DC high-voltage side voltage signal, current signal and battery voltage signal are collected respectively and sent to SG3525A. By adjusting the duty cycle of the drive pulse or shutting down the pulse, voltage regulation, overcurrent protection and undervoltage protection functions are realized.
Main technical parameters
Input voltage: DC 12V;
Output voltage: AC 220V±5%, 50Hz±2%;
Rated power: 100W;
Protection function: input DC polarity reverse protection, input undervoltage protection, output overcurrent protection Circuit design
1 Main control
chip
SG3525A
SG3525A is a pulse width modulator control integrated circuit produced by ST. It has integrated reference voltage , oscillator synchronization, soft start time control, input undervoltage lockout and other functions. The pinout of SG3525A is shown in Figure 2.
Determination of oscillation frequency: The oscillation frequency is set by three external components RT, CT and RD, which are connected to pins 6, 5 and 7 respectively. The oscillation frequency is fOSC = 1/CT (0.7RT + 3RD), where 0.7RTCT is the charging time of the timing capacitor and 3RDCT is the discharge time of the timing capacitor. In order to obtain a 50Hz oscillation frequency for the frequency division and phase division circuit , this design sets the oscillation frequency to 51.2kHz, taking CT = 2000pF, RT = 10kΩ, and RD = 922Ω
Adjustment of output pulse width: The PWM pulse width is controlled by the lower level of pin 9 and pin 8. The error amplifier U1 inside the chip amplifies the deviation between the voltage feedback signal and the reference voltage signal and sends it to the reverse input of the comparator U2. The input of the positive input of the comparator comes from the sawtooth wave on the capacitor CT. After comparing the two, the square wave pulse is output to control the duty cycle of the output power amplifier tube inside SG3525A (see Figure 3). In this design, pin 8 is grounded through a capacitor, and pin 9 is connected to the feedback voltage of the DC/DC high-voltage DC voltage, thereby adjusting the stability of the output DC voltage. In Figure 3, U1 is the error amplifier in SG3525A, 1, 2, and 9 are chip pins, and R1~R7, C1, and C2 are external resistors. The 16-pin of capacitor SG3525A outputs 5V reference voltage. Resistors R3, R4 and U1 form an inverse proportional operator. R4/R3 is its static gain. The larger its value, the higher the control accuracy. However, too large amplification will cause oscillation. Therefore, C1 and R5 are introduced to make the error amplifier an incomplete proportional-integral controller. At this time, the static error gain remains unchanged and the dynamic error gain is reduced, which neither affects the control accuracy nor avoids oscillation caused by overshoot.
Pulse shutdown: When the 10 pin is added with a high level, the output pulse is blocked. This design uses this function to achieve output over-current and over-voltage protection and input under-voltage protection.
2-way frequency division and phase division
Circuit
The frequency division circuit is composed of 14-level serial binary counter/distributor CD4020B. The frequency division signal comes from the oscillator output pin 4 of SG3525A. A, B, and C in Figure 4 represent the waveforms of the oscillator pulse after 8, 9, and 10 levels of frequency division, respectively. Their frequencies are fA=fOSC/28, fB=fOSC/29, and fC=fOSC/210. The phase division circuit is composed of a single chip with two input terminals and four NAND gates CD4011BC and peripheral devices. The signal ABC is logically combined into the drive pulses (A+B)C and (A+B)C signals required by the inverter bridge. The drive signal has a common dead zone and the signal frequency is about 50Hz.
3 Protection circuit
① Input undervoltage protection
As shown in Figure 5, D1 is the reference voltage for the reverse polarity protection of the battery. Pin 16 of SG3525A is output.
The voltage
is 5V. R3=R4=10kΩ. Under normal circumstances, the voltage at the inverting input of U1 is greater than the voltage at the forward input. U1 outputs a low level, and
diodes
D1 and D2 are cut off. When the battery voltage is lower than 10V, the comparator U1 starts to work, and the output changes from a low level to a high level. D2 and D3 are turned on, and the potential of the non-inverting input terminal is raised to a high level, so that U1 always outputs a high level stably, and outputs a shutdown signal to pin 10 of SG3525A.
② Output Current Overload Protection
As shown in Figure 6, op amp U2 and peripheral resistors constitute an inverse proportional amplifier, and op amp U3 and peripheral circuits constitute a comparator. R3 in Figure 1 is a sampling resistor, which is 2.2Ω, 2W. When the load current increases, the voltage drop △U of the resistor increases.
The input voltage of the positive input terminal of the operational amplifier U3 is: U+=(1+R2/R1)×(R3/R4)×△U
The values of R1, R2, R3, and R4 are appropriately adjusted so that when the load current exceeds 1.5A, the potential of the forward input terminal of U3 is higher than that of the reverse input terminal, and the output is high. Diodes D2 and D3 are turned on, and the potential of the non-inverting input terminal is raised to a high level, so that U1 always outputs a high level stably, and outputs a shutdown signal to pin 10 of SG3525A.
Cooling by design
In order to further reduce the size and weight, the outer shell (casing) was used to dissipate heat and cool the machine, which not only solved the problem of heat dissipation, but also made the whole machine smaller and lighter.
Inverter test output waveform
DC/DC conversion output Voltage Stable at 320V, inverter bridge switching frequency is 50Hz, connected to 500Ω resistor Load test Circuit Waveform is shown in Figure 7
Conclusion
The vehicle-mounted inverter power circuit designed in this paper mainly adopts integrated chips , which makes the circuit structure simple, the performance stable and the cost low. The actual application proves that the inverter power supply works stably and reliably and can continuously output 100W of power.
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