[When building a signal chain, you need to know the high-speed signal knowledge (Part 3)]

High-speed challenges – transmission link loss and balance

The contradiction in the upgrade and iteration of high-speed buses is that consumers' demand for performance drives the signal rate to grow exponentially, while consumers' demand for convenience makes it impossible to shorten the transmission line. Consumers' pursuit of low cost requires that PCB boards and transmission lines should not be too expensive, which leads to ISI jitter becoming more and more serious. Equalization is a widely used black technology to deal with ISI jitter. Since the root cause of ISI jitter is the difference in the loss of signals of different frequencies in the transmission link, equalization is to find a way to compensate for this difference so that the amplitude of signals of different frequencies can be kept uniform.

According to the location where the equalization technology is used, it is generally divided into transmitter equalization (Tx EQ) and receiver equalization (Rx EQ).

The transmitter equalization generally adopts the feed forward equalization (FFE) technology, which uses a set of shift registers with multipliers and adders to correct the voltage value of r(n) according to the influence of the current bit r(n) on the previous bits r(n-1), r(n-2), r(n-3)... The typical expression is:

e(n)=r(n)*k1+r(n-1)*k2+…

This expression has N terms, which is called N-order FFE, representing the level of the current bit, which is affected by itself and the previous (N-1) bits. The most widely used "pre-emphasis/de-emphasis" technology in high-speed serial is a second-order FFE, which adjusts the level of the current bit according to the logic state of the current bit and the previous 1 bit.

Let's look at a real example of pre-emphasis. When the signal at the transmitter is not processed in any way, the eye diagram at the transmitter is perfect; once the signal is transmitted through a long backplane, severe ISI jitter will cause the eye diagram to be almost closed (Example 1). When the transmitter adds 3.5dB pre-emphasis, the amplitude of the high-frequency transition edge signal (Transition Bits, which refers to the bit with a different logical state from the previous bit, such as 1 in the 01 code pattern, or 0 in the 110 code pattern) will be enhanced by 3.5dB. These pre-enhancements will partially offset the loss of the long backplane, so that the levels of different code patterns are basically equal when they reach the receiver, and the ISI jitter is greatly reduced. The eye diagram at the receiver has very obvious improvements in terms of eye height, eye width, and jitter (Example 2).

Figure 2.0 : Effect of transmitter equalization on eye diagram

If equalization at the transmitter is a precaution, then equalization at the receiver is a last-ditch effort. When ISI jitter has been transmitted to the receiver, how should the receiver perform equalization to try to get a better eye diagram? Receiver equalization generally uses CTLE (continuous time linear equalization) or DFE (negative feedback equalization), or a combination of the two, to reduce the ISI jitter of the data.

DFE equalization is similar to FFE, but the difference is that DFE has negative feedback adjustment function. Through negative feedback, the equalization coefficient can be adaptively adjusted to achieve the best equalization effect. At the same time, DFE can not only eliminate ISI jitter, but also provide a certain compensation effect for crosstalk between channels, which is very useful for improving signal integrity.

The implementation method of CTLE is somewhat similar to that of FIR filter, and it achieves an effect similar to that of a bandpass filter. The figure below shows a set of typical CTLE filters, with large attenuation at low frequencies and small attenuation at high frequencies. This filter curve is complementary to the loss of the transmission link (the insertion loss of the transmission link is small attenuation at low frequencies and large attenuation at high frequencies). At the receiving end, uniform overall loss between different frequencies is achieved, thereby reducing ISI jitter. CTLE is different from DFE/FFE in that it does not rely on a reference clock and equalizes the signal in the continuous time domain; while DFE/FFE is an equalization in the digital domain, and a reference clock must be available first to distinguish different bits before equalization can be performed. The receiving end often uses a combination of CTLE and DFE, first using CTLE to open a nearly closed eye diagram, recover the clock, and then using DFE for further equalization and compensation.

Figure 2 1 : Typical C TLE equalization is similar to a bandpass filter

In order to solve the ISI problem, design engineers often need to make a comprehensive consideration between link loss and equalization technology. Tektronix's SDLA software can simulate the Tx EQ at the transmitter and the Rx EQ at the receiver, and can also simulate different losses of the transmission link.

Figure 2 2 : SDLA software supports transmitter and receiver equalization, as well as link embedding/de-embedding simulation

It allows you to estimate the ISI jitter of the link in the early stage of product design, explore and try the best equalization combination to reduce ISI jitter, and significantly reduce the time of product development.

Figure 2 3 : Transmitter eye diagram, receiver eye diagram obtained by S DLA channel embedding, and final eye diagram obtained by SDLA receiver equalization