Phase Change Memory Device Unit Test System

　　Chalcogenide random access memory, referred to as C-RAM. The C-RAM cell structure is lower electrode/phase change material/upper electrode, where the phase change material is a chalcogenide storage medium, and the more mature one is GST (Ge 2Sb2Te5). The basic principle of its storage is that different pulse signals are applied through the electrodes to make the phase change material realize a reversible phase change between polycrystalline and amorphous, where the amorphous resistance is about two orders of magnitude higher than the polycrystalline resistance. When a short and strong pulse is applied to raise the temperature of the phase change material to above the melting temperature [2], and then it is rapidly cooled to achieve the transformation from polycrystalline to amorphous, which is called writing here; when a long and medium-intensity pulse is applied to raise the temperature of the phase change material to below the melting temperature and above the crystallization temperature, it is kept for a period of time to promote the growth of the crystal nucleus to achieve the transformation from amorphous to polycrystalline, which is called erasing here; when a very weak pulse that does not affect the phase of the phase change material is applied, its state is read by measuring the resistance value of the C-RAM, which is called reading here [4-5]. Therefore, by applying different pulse signals, information writing, erasing and reading operations can be realized.

　　2 Design Principles

　　The design of this system is based on seven test modules: current and voltage relationship test, voltage and current relationship test, resistance and write pulse signal height relationship test, resistance and write pulse signal width test, resistance and erase pulse signal height test, resistance and erase pulse signal width test, polycrystalline or amorphous resistance and write and erase times relationship test.

　　⑴ The current-voltage relationship test applies a voltage pulse signal with gradually increasing amplitude to measure the current corresponding to the storage unit at this time. Since the gradually increasing voltage is converted into corresponding thermal energy through the storage unit, the phase change material is transformed from amorphous to polycrystalline. Due to the obvious difference in resistance between amorphous and polycrystalline, two curves with different slopes are displayed on the current-voltage curve. Through this curve, the threshold voltage, threshold current, and resistance characteristics before and after the phase change of the phase change memory device can be studied.

　　(2) The voltage-current relationship test applies a current pulse signal with gradually increasing amplitude to measure the voltage corresponding to the storage unit at this time. Due to the same principle, a two-segment curve with significantly different slopes can be obtained. Through this curve, the threshold voltage, threshold current, and resistance characteristics before and after the phase change of the phase change memory device can be studied.

　　⑶ The test of the relationship between resistance and write pulse height is to apply a pulse signal with a constant pulse width and gradually increasing pulse height. When the pulse height increases to the point where the resistance of the phase change material changes from low resistance to high resistance, it is exactly the optimal parameter of the write pulse height, which is beneficial to the power consumption research of devices with different structures and different materials.

　　⑷ The test of the relationship between resistance and write pulse width is to apply a pulse signal with a constant pulse height and gradually increasing pulse width. When the pulse width increases to the point where the phase change material changes from low resistance to high resistance, the pulse width is exactly the optimal parameter of the write pulse width, which is beneficial to the study of the speed and power consumption of devices with different structures and different materials.

　　⑸ The test of the relationship between resistance and rubbing pulse height and the test of the relationship between resistance and rubbing pulse width are based on the same principle. The optimal parameters of pulse width and pulse height when the phase change material changes from high resistance to low resistance can be found, which is conducive to the study of speed and power consumption of devices with different structures and different materials.

　　(6) The fatigue characteristics test module applies a certain number of write-erase pulse signals, and then measures the size of the phase change resistance after applying such a large number of write-erase pulse signals. This cycle is repeated until the total number of write-erase times reaches a point where the resistance of the phase change material changes significantly. At this time, the total number of write-erase times is the maximum cycle life of the device, which is beneficial to the study of the fatigue characteristics of polycrystalline and amorphous devices with different structures and different materials.

　　This paper mainly discusses the hardware composition and software implementation of C-RAM device unit testing, as well as the experimental results.

　　3 System Hardware Design

　　Based on the above design ideas, a complete C-RAM device unit test system is designed. Its hardware consists of a control computer, a pulse signal generator, a digital signal source, a micro-control probe station, a control card, a GPIB card and conversion connection components, as shown in Figure 1.

　　(1) The pulse signal generator is model 81104A produced by Agilent Corporation of the United States. The pulse signal generator can generate a single pulse or continuous pulse signal in single-channel and dual-channel modes. The purpose is to write and erase the device unit. The height range of the current pulse signal is 0~400mA, the height range of the voltage pulse signal is 0~10V, and the width of the pulse signal is 6.25ns~999.5s.

　　⑵The digital signal source is model 2400 produced by Keithley Corporation of the United States. Its function is to provide a current or voltage signal source to test the corresponding voltage, current or resistance. The range of the current signal source is 50pA~1.05A, the range of the voltage signal source is 5μV~210V, the corresponding test current range is 10pA~1.055A, the test voltage range is 1μV~211V, and the test resistance range is 100μΩ~211MΩ.

　　⑶ The micro-controlled probe station is the RHM-06 model produced by Cascade Corporation of the United States. The micro-controlled probe station is mainly composed of a sample stage, a probe, an optical microscope, a micro-control knob, a vacuum pump and other parts. Its main function is to provide a platform for placing samples and to introduce pulse signals and measurement signals and apply them to the samples.

　　⑷ The computer is used as the main control device, and all test processes are controlled by the software on the computer. The computer uses a control card to realize the switching of the micro-control probe station between the pulse signal generator and the digital signal source, and uses the GPIB card to realize the control of the pulse generator and impedance test equipment as well as the data collection and transmission. The pulse signal generator, digital signal source, and micro-control probe station are all connected to the control card through a junction box, which ensures convenient and good connection and sufficient shielding.

4 System software design

　　After the hardware structure is determined, the next step is software design. Microsoft Visual C++ is used to write a Windows traditional operation interface [6]. The structure diagram is shown in Figure 2. The software mainly includes the experimental process management module and the data management module. The experimental process management module is mainly responsible for the control of all experimental processes, including the setting of experimental parameters, the selection and scheduling of various experimental control modules, the inspection and transmission of experimental data, etc. The experimental data management module is mainly responsible for obtaining test data from various test modules and saving, drawing and editing according to requirements.

　　According to the design idea of ​​the C-RAM device unit test system, there are mainly 7 software test modules: write pulse width and current relationship test module, write pulse height and current relationship test module, erase pulse width and current relationship test module, erase pulse height and current relationship test module, fatigue characteristics test module, current and voltage relationship test module, voltage and current relationship test module. Each module is centrally scheduled by the experimental process management module.

　　The operation of the control card is realized through the control card module, that is, the microcontroller needle switches between the pulse signal generator and the digital signal source; the control of the pulse signal generator and the digital signal source is realized through the pulse generator control module and the digital signal source control module, that is, the writing, erasing and testing of the storage device; the pulse generator control module and the digital signal source control module communicate with the GPIB interface module at the same time, that is, sending and receiving information from each device; the control card module and the GPIB interface module both communicate with the hardware through the driver installed in the kernel layer.

　　As can be seen from Figure 2, the software test module can be expanded accordingly according to the different test contents, that is, the software structure is portable, which is the advantage of modular design. According to the software structure diagram of Figure 2 and the design ideas of various modules, refer to the instructions of each component in the hardware structure, perform software programming, and after confirmation, perform overall debugging of the combination of software and hardware until the entire system is debugged.

　　5 System test experiment

　　In order to verify the function of the test module of the device unit test system, the C-RAM unit device was tested [7]. Figure 3 (a), (b), (c), and (d) are the test results of the relationship between current and voltage, voltage and current, resistance and write pulse height, and resistance and write pulse width. From Figure 3 (a), we can see that the threshold voltage of this storage unit is 0.54V; from Figure 3 (b), we can see that the threshold voltage of this storage unit is 0.46V; from Figure 3 (c), we can see that when the write pulse width is fixed at 30nS and the erase current is 3.5mA, the phase transition from polycrystalline to amorphous is achieved; from Figure 3 (d), we can see that when the write current is fixed at 3.5mA and the pulse width is 30nS, the phase transition from polycrystalline to amorphous is achieved. This shows that the C-RAM device unit test system is reliable and meets the expected requirements.

　　6 Conclusion

　　C-RAM is still in the research and development stage, and there is no relevant standard test system at home and abroad. This system provides a good platform for characterizing the electrical and storage performance of device units (such as threshold voltage and current, read/write/erase optimal operating parameters, fatigue characteristics, reliability, etc.). All test modules have been applied in research and provide necessary experimental data.