Semiconductor integrated circuit industry chain!

▲Chart of revenue composition of the global semiconductor industry chain

In the IC manufacturing process, the main processes include Thermal Process, Photolithography, Etch, Ion Implant, Dielectric Deposition, CMP, and Metallization . These main processes can be further divided into specific processes.

▲ Corresponding equipment and materials in the manufacturing process

• Si: Mainly used in integrated circuit wafers and power devices;

• GaAs : Mainly used in high-power light-emitting electronic devices and radio frequency devices;

• GaN : Mainly used in optoelectronic devices and microwave communication devices ;

• SiC : Mainly used in power devices

▲ Main applications of representative materials of each generation

▲ Technological maturity of the second and third generation semiconductor materials

• In 2017, Tsinghua Unigroup's sales were $2.1 billion, making it the largest IC design company in mainland China and ninth in the world. However, it should be noted that if HiSilicon (more than 90% of its sales come from its parent company Huawei), ZTE and Datang's internal supply are excluded, the market share of mainland IC design companies will drop to around 6%.

• In 2017, there were 1,380 IC design companies in China, accounting for 14.5% of the world's total. However, in terms of revenue scale, only 2% to 3% of the 1,380 companies had revenue exceeding US$100 million, and only about 200 companies had revenue exceeding RMB 100 million.

According to statistics from market research firm IC Insights, chip design companies accounted for 27% of global integrated circuit sales in 2017, a year-on-year increase of 9% compared with 18% in 2007.

IC design market share: Mainland China accounted for 5% of the market share in 2010 and 11% in 2017. The above chart shows that in 2017, 10 companies have entered the list of top 50 IC design companies, while there was only one mainland company in the list in 2009.

According to a research report by TrendForce, the total output value of global foundries in 2017 was US$57.3 billion, a 7.1% increase from the output value of US$53.5 billion in 2016; the global wafer foundry output value will grow at a rate of more than 5% for five consecutive years. In the first half of 2018, the annual growth rate of the global wafer foundry output value was 7.7%, and the estimated output value reached US$29.06 billion.

▲ Output value and growth rate of China’s wafer manufacturing industry from 2012 to 2018

According to TrendForce, China's high capital expenditure wafer fab construction will heat up industry competition and drive capacity expansion. There are currently 40 wafer fabs larger than 8 inches in mainland China, 16 of which are under construction. More will enter mass production in 2018, and the overall output value is expected to increase rapidly. The output value in 2018 can reach 176.7 billion yuan, with an annual growth rate of 27.12%.

Compared with foreign manufacturing, my country is still at a disadvantage

▲ Serious imbalance between imports and exports

SMIC vs TSMC

Compared with TSMC, SMIC's advanced process is relatively backward. TSMC's mature process accounts for 55% of its total production capacity, while SMIC's is as high as 86%.

Compared with the production capacity in 2016, TSMC's total production capacity is 5 times that of SMIC, and its mature process

In terms of production capacity, TSMC's production capacity is 3.5 times that of SMIC.

▲ China’s gap in wafer production capacity based on different sizes

According to the Prospective Industry Research Institute, among the current 12-inch wafer fabs in my country, SK Hynix has the largest production capacity, reaching 170,000 wafers per month, followed by Samsung, with a monthly production capacity of 120,000 to 170,000 wafers; the combined production capacity of SMIC's three plants is 100,000 wafers per month. At the end of 2017, Hefei Jinghe 12-inch wafer fab officially went into mass production. According to the plan, its production capacity will reach 80,000 wafers per month after full production.

▲ Moore's Law and the Fifty-Year Development of Microprocessors

▲Wafer node roadmap

▲ Overseas 7nm technology research and development

SMIC achieves major breakthrough in 14nm technology

•The largest wafer foundry in the mainland, with the Big Fund as the second largest shareholder, and co-invested with the Big Fund and others to establish a semiconductor industry fund.

• SMIC announced its second quarter 2018 financial report, which showed that the company has made significant progress in the development of 14nm FinFET technology and the first-generation FinFET technology research and development has entered the customer introduction stage.

• The yield rate is constantly improving, and the goal of formal mass production in 2019 seems not far away. It is planned to start risk trial production of 14nm FinFET process in the first half of 2019, and will also enter the field of artificial intelligence.

• In addition to 28nm PolySiON and HKC, the development of 28nm HKC+ technology has also been completed. The volume of 28nm HKC continues to increase, and the yield has reached the industry level.

• Ordered an EUV device worth US$120 million. Currently, this device is the most advanced in the world and can produce chips with 5nm process technology!

SMIC is still 2-3 generations behind market leaders such as TSMC and Intel in manufacturing technology, and 2-4 generations behind its competitors in 14nm process. There is still a large gap in annual production capacity. SMIC's total annual production capacity of about 8 inches is 5373K, while TSMC can reach 23410K, more than 4 times that of SMIC.

Packaging is an indispensable link in the integrated circuit industry chain and is located in the downstream link of the entire industry chain. In the entire industry chain, packaging refers to the process of obtaining integrated circuit products with certain functions through a series of processing steps such as dicing, mounting, bonding, plastic sealing, electroplating, cutting and forming of the tested wafer.

Packaging is to put "clothes" on the chip to protect it from damage caused by physical, chemical and other environmental factors, enhance the heat dissipation performance of the chip, standardize and facilitate the connection of the chip's I/O port to the component-level (system-level) printed circuit board (PCB), glass substrate, etc., to achieve electrical connection and ensure the normal operation of the circuit. The quality of packaging technology directly affects the performance of the chip itself and the design and manufacture of the PCB connected to it. An important indicator to measure the advancement of a chip packaging technology is the ratio of chip area to packaging area. The closer to 1, the better.

▲ Revenue scale of the global semiconductor packaging and testing market from 2010 to 2020

▲ Revenue scale of the global semiconductor packaging and testing industry from 2014 to 2018

Generally speaking, testing business is mainly concentrated in packaging enterprises, so packaging and testing are also commonly referred to as the packaging and testing industry. The output value of semiconductor packaging and testing undertaken by global IDM itself is greatly affected by the prosperity of the semiconductor industry, while packaging and testing foundry shows a steady growth trend.

According to Gartner's valuation, the global semiconductor packaging and testing revenue in 2018 was US$55.31 billion, an increase of 3.9% over 2017.

According to Gartner's statistics and forecasts, the global semiconductor packaging and testing industry's operating revenue in 2018 was US$33.143 billion, an increase of 6.3% over 2017.

In recent years, driven by the development of mobile intelligent terminal baseband chips, application processors, wireless communication chips and other products, the demand for high-end advanced packaging market has risen sharply. Among them, fan-out wafer foundry-level advanced packaging (Fan-out-WLP) is the most popular. According to TechSearch estimates, the market size of Fan-out WLP will reach 1.9 billion in 2018 and reach a production value of US$2.5 billion in 2020.

In recent years, due to the development of smart terminals such as smartphones, the demand for mid-to-high-end integrated circuit products in the domestic and international integrated circuit markets has continued to increase. As a result, the demand for advanced packaging technologies such as BGA, WLP, FC, SIP, and 3D has shown a rapid growth trend, resulting in a situation in which traditional packaging is decreasing and the share of advanced packaging is increasing.

Leading companies in the industry are gradually moving into the field of advanced packaging. Based on the maturity of advanced packaging technology, Chinese companies are divided into three echelons: