Zhishi Classroom [Basic Knowledge of CMOS Logic IC] - Popular CMOS Logic IC

What is CMOS?

A circuit using a complementary combination of p-channel and n-channel MOSFETs is called CMOS (Complementary MOS). CMOS logic ICs combine MOSFETs in various ways to implement logic functions. The logic gate consisting of a pair of p-channel and n-channel MOSFETs is called an inverter. Figure 1 is a basic logic IC result diagram, and Figure 2 briefly introduces the operation of the inverter in the form of a flow chart.

Figure 1 Schematic diagram of CMOS logic IC

Figure 2 Schematic diagram of the basic working principle of the inverter

In CMOS logic ICs, various logic functions can be implemented by combining p-channel and n-channel MOSFETs to obtain the desired output results based on different inputs. When the MOSFET's gate-source voltage exceeds a certain voltage (threshold voltage, |V th |), the drain-source resistance decreases, causing the MOSFET to turn on. This drain-source resistance is called on-resistance. The direction of the voltage applied between the gate and source of n-channel and p-channel MOSFETs is different. Figure 3 shows the conditions under which the MOSFET turns on.

Figure 3 Conditions for MOSFET to turn on

N-channel MOSFET: When the gate voltage is higher than the source voltage |V th |, the n-channel MOSFET turns on.

P-channel MOSFET: When the gate voltage is lower than the source voltage |V th |, the p-channel MOSFET turns on.

As the basic component of CMOS logic IC, the inverter shown in Figure 4 works as follows. When V IN is at V CC or GND level, either p-channel or n-channel MOSFET is off. Therefore, only a small current (I CC ) flows between V CC and GND. When the input is in a stable state (at V CC or GND level), I CC is very low.

Figure 4 Components of CMOS logic IC (inverter)

Figure 5 shows the V IN -I CC curve of CMOS. When V IN is between 0 and |V th | or between V CC - |V th | and V CC , only a small current (I CC ) flows between V CC and GND. However, when V IN is between |V th | and V CC - |V th |, shoot-through current flows from the p-channel MOSFET to the n-channel MOSFET, thereby increasing I CC . Therefore, care should be taken to ensure that the input to V IN does not change too slowly.

Having understood the basic working principles of CMOS logic ICs, we next learn more about the construction of CMOS logic ICs by showing cross-sectional examples:

In the figure below, #1 is the N substrate, usually the wafer substrate. #2 is P well, which refers to the area where n-channel MOSEFT is formed. #3 is the diffusion area of ​​the n-channel MOSFET source. #4 is the diffusion area of ​​the n-channel MOSFET drain. #5 is the diffusion area of ​​the p-channel MOSFET drain. #6 is the diffusion area of ​​the p-channel MOSFET source. #7 is the p-well bias diffusion area. #8 is the n substrate bias diffusion area.

Figure 6 Cross-section example

As a manufacturer of CMOS logic ICs, Toshiba has released successive generations of high-speed and low-voltage CMOS logic ICs since the launch of the first standard CMOS series (4000 series), including standard CMOS, high-speed CMOS, upgraded CMOS, ultra-high-speed and Products with different indicators such as low-pressure and ultra-low-pressure systems. In the future, Toshiba will continue to provide CMOS logic ICs suitable for various applications.

Figure 7 Toshiba CMOS IC series

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