As an indispensable part of electronic systems, power modules are the most common and also one of the parts that tests the skills of hardware engineers. The power module is a subsystem in the electronic system that realizes the functions of conversion, distribution, control and monitoring of electric energy. The power consumption, performance, cost and volume of the entire electronic system are directly related to the design of the power module. Modern large-scale electronic systems are developing in the direction of high integration, high speed, high gain and high reliability. Small interference on the power supply will affect the performance of electronic equipment, which requires the design of low-noise and ripple-resistant power modules; and in portable devices, battery power supply is increasingly used, which puts high demands on battery life, which usually corresponds to the extreme requirements of high efficiency, high reliability and low quiescent current of its power module.
In short, power module design is the basis for the performance of electronic systems. Only after the power module design of the system is done well, there is a chance to pursue performance and robustly realize all the functions of the system. And the most important thing in power module design is how to choose the right chip and technical solution. Usually, according to the conditions of each branch in the power module, the input and output voltage difference is determined, and then according to the application requirements, under the constraints of efficiency indicators, heat dissipation restrictions, noise requirements, system complexity and cost, the most suitable power chip can be selected, and then the corresponding power conversion and distribution functions can be realized according to the selected power chip.
According to the application scenario, power modules can be divided into AC to DC (AC-DC) conversion power modules and DC to DC (DC-DC) conversion power modules. AC-DC power modules are usually used for equipment that directly uses AC power, while DC-DC power modules can only be connected to a DC power supply, and then divide or boost the voltage based on the DC power input to supply the required voltage and current for each module in the system.
According to the working principle, power chips can be divided into linear power chips and switching power chips. Linear power is also called low drop out regulator (LDO) chip. Its principle is to adjust the output voltage through the voltage drop of the transistor. It can only achieve step-down output, but not step-up output. Compared with switching power chips, LDO usually has the characteristics of small size, low noise and easy use.
The switching power supply chip works in pulse width modulation (PWM) mode, which can achieve buck-boost output, and has high efficiency and low power consumption. However, since it works in PWM mode, it will generate electromagnetic interference (EMI), so the noise is usually greater than the corresponding LDO.
According to the implementation method, switching power supplies can be divided into two categories, namely inductive DC-DC power supply chips and DC-DC converters based on switched capacitors (i.e. charge pump DC-DC chips). Charge pump DC-DC chips use capacitors as switches and energy storage elements. Compared with inductive DC-DC power supply chips, they have the advantages of high efficiency, small size, low quiescent current, wide output voltage adjustment range, low V
min
, low noise and low EMI. In addition, capacitors are easier to integrate than inductors, so charge pump power supply chips can achieve higher integration. In low-power applications, charge pump DC-DC switching power supply chips have great advantages, but charge pump power supply chips are not suitable for high-voltage and high-power scenarios. Therefore, in high-power applications, inductive DC-DC power supply chips still occupy a dominant position.
In complex systems with high-performance processors, large FPGAs and other large chips, the current consumption can reach several amperes to tens of amperes, so it is usually necessary to use a combination of switching power supplies and LDOs. Analog circuits that are susceptible to interference in complex systems are usually powered by LDO chips; and the digital part has high efficiency requirements due to the large current, and the digital circuit itself has stronger anti-interference ability, so it is more suitable to be powered by a switching power supply. The combination of switching power supplies, LDOs and various protection devices and passive components builds a distributed power system for complex systems.
In short, LDO and switching power supply are the core of power modules in all electronic devices. The development of electronic systems has also put forward higher requirements for power chips. R&D personnel are constantly trying to update manufacturing processes, packaging technologies and circuit topologies to achieve more extreme performance or other indicators such as volume and cost. Let's take a look at how to choose a suitable power chip based on the development trend of power chips.
Lower quiescent current – for lower losses
The annual shipment of mobile phones (including smart phones and feature phones) is nearly 2 billion units, and the annual shipment of laptops is over 100 million units. With the development of Internet of Things technology, more and more battery-powered devices are connected to the network. The typical working state of these devices is short-term activation and relatively long-term dormancy. They usually need to work for a whole year or even three to five years without replacing the battery. Such applications place extremely high demands on power chips. They must have extremely low static current to maintain power efficiency under light load or no load, meet the device's requirements for long battery life, and meet the system's requirements for power supply capacity under heavy load. It is not easy to do well.
The LT3009
from
manufacturer
Analog Devices (ADI)
sold by Mouser Electronics
is an LDO chip that can simultaneously meet the requirements of microampere (uA)-level quiescent operating current and 20 milliampere (mA) high drive capability. Specifically, the LT3009 has a no-load quiescent current of 3uA and can provide 20mA output current at a 280mV voltage difference (input/output). The input voltage range is 1.6V to 20V, and the output voltage range is 0.6V to 19.5V. In addition, the LT3009 only requires a 1uF capacitor to ensure the stability and transient response of the output power supply. It integrates protection functions such as current limiting, temperature limiting, reverse battery connection protection, and reverse current protection, which can effectively ensure the power safety of portable devices.
Figure 1: LT3009 voltage drop vs. quiescent current
(Image source: ADI)
In general, LT3009 is very suitable for applications that require ultra-low standby power consumption and can support medium-intensity driving capabilities. In addition to common handheld devices, it can also be used in gas meters, water meters, access control and other applications. LT3009 is particularly good at energy saving. When the load increases, the current of the ground pin will never exceed 5% of the output current, and when it is turned off, the quiescent current is less than 1uA.
Figure 2: LT3009 Typical Application Circuit
(Image source: ADI)
Reducing EMI (electromagnetic interference) is mainly aimed at switching power supply chips (Switch Regulator). Since the switching power supply chip works in the pulse width modulation state, the switching frequency is mostly hundreds of KHz to several MHz, or even higher, so the switching power supply itself is an interference source. If the parameters of the switching power supply circuit are not set ideally during implementation, the electromagnetic interference it emits will be aggravated. Sometimes the electromagnetic compatibility test of the equipment cannot pass, which may be because the switching power supply part is not handled properly.
The main methods to reduce EMI on the equipment circuit board include adding shielding or filtering (circuit modification is possible), reducing the rising slope of the switching waveform, turning on the spread spectrum function if the chip has a spread spectrum function, and modifying the PCB routing. In general, the board-level optimization EMI methods have costs, such as increasing costs or affecting power supply performance. The best solution is that the switching power supply chip itself fully considers the electromagnetic interference problem during board-level implementation, solves the EMI problem at the chip level, and has low cost and will not affect system performance.
ADI's Silent Switcher technology significantly improves the EMI performance of switching power supplies at the chip level, thereby effectively reducing EMI without affecting power supply performance and without adding external components. It is a simple, efficient and low-cost solution.
Figure 3: Traditional current loop topology (left) and Silent Switcher topology (right)
(Source: ADI)
In principle, ADI's Silent Switcher technology will form two symmetrically distributed current loops. The magnetic fields generated by these two loops are in opposite directions, so the energy cancels each other out, and the module electrical loop has no net magnetic field to the outside. Therefore, Silent Switcher technology does not need to reduce the switching speed of the transistor, solving the mutual exclusion problem between EMI and efficiency.
Figure 4: Schematic diagram of Silent Switcher electromagnetic field
(Image source: ADI)
In addition, Silent Switcher technology uses a copper pillar flip-chip packaging process, which can significantly reduce the parasitic impedance of the chip pins. Therefore, it can not only reduce EMI but also improve the efficiency of the switching power supply.
Figure 5: Comparison between traditional packaging (left) and copper pillar flip-chip packaging (right)
(Image source: ADI)
Today, Silent Switcher has developed to the second generation. For example,
LT8650S
uses the second-generation Silent Switcher technology. Compared with the first-generation Silent Switcher, two external matching capacitors are integrated into the chip, which reduces external components and reduces the loop area, reduces EMI, and improves adaptability to PCB. Hardware engineers have more freedom when designing circuits using LT8650S.
Figure 6: Silent Switcher 1 requires external loop capacitors (left)
Silent Switcher 2 integrates the loop capacitor into the chip, making the design simpler (right)
(Image source: ADI)
From the measured results,
the waveform comparison between
the LT8614
using the first-generation Silent Switcher technology
and the traditional LDO LT8610 under the same conditions shows that the LT8614 is about 20dB better than the LT8610, while the LT8650 integrating the second-generation Silent Switcher technology has even better EMI performance.
Figure 7: Test results of the improved EMI characteristics of the first generation Silent Switcher
(Image source: ADI)
Lower noise, higher precision
In addition to EMI, in applications such as medical electronics, precision instruments and equipment, high-precision power supplies and communication infrastructure, the requirements for noise and power supply ripple rejection ratio (PSRR) of the power chip itself are also very high, because in these applications, there are usually sensitive circuit modules, such as ADC, DAC circuits, precision amplifiers, high-frequency oscillators, clocks and PLLs, etc. If the power supply is not clean, the performance of these sensitive circuits will be greatly affected. Since sensitive circuits have high requirements for noise, usually this module can only be powered by LDO chips with better noise suppression. With the changes in market applications, sensitive precision circuit technology continues to develop, constantly pushing precision LDO power chips to move further in the direction of lower noise and higher precision.
The noise of LDO comes from two parts, internal noise and external noise. Internal noise mainly includes thermal noise and 1/f noise, which are related to LDO design and semiconductor process. There are many sources of external noise, the most common of which is the noise of LDO input power supply (usually powered by the output of switching power supply chip). Since LDO has high gain, it can ensure good line and load regulation performance, so it can attenuate noise and ripple from input power supply. This is the power supply ripple rejection ratio of LDO. Since LDO bandwidth is limited, its PSRR decreases with the increase of frequency. Noise outside the LDO bandwidth cannot be attenuated by LDO itself, and needs to be reduced by passive filter.
The LT3042 from ADI sold by Mouser Electronics is an LDO chip with ultra-low noise and ultra-high PSRR architecture suitable for sensitive circuit applications. The RMS noise of LT3042 from 10Hz to 100kHz is only 0.8uV (RMS value), the point noise at 10kHz is only 2nV/Hz, and the PSRR is 79dB at 1MHz. The following
Figure 8
shows the typical application circuit and PSRR parameters of LT3042.
Figure 8: Typical application circuit (left) and PSRR parameter (right) of LT3042
(Source: ADI)
The LT3042 provides nearly constant internal noise, PSRR, bandwidth and load regulation over a wide output voltage range of 0 to 15V. These parameters are independent of the output voltage, making it ideal as a high-precision current reference and can be cascaded to further reduce noise.
What we have mentioned above are all low-power applications. In high-power applications, power chips are also indispensable. Compared with low-power applications, high-power applications have additional requirements, namely isolation. The function of isolation is to cut off the direct loop between the high-current, high-voltage module and the low-current, low-voltage module in the electronic system, and transmit the control signal through coupling to protect the operator and the low-voltage circuit module, and reduce the interference of the high-voltage and high-current module on the low-voltage circuit part.
Optocoupler isolation is a more traditional isolation method, but the optocoupler isolation solution has many disadvantages, such as easy aging, slow speed and high power consumption. However, before the emergence of digital isolation technology, optocouplers were an extremely suitable isolation solution. In the late 1990s, digital isolation technology began to be industrialized. Due to its huge advantages in size, speed, power consumption, ease of use and reliability that optocouplers cannot match, it has been widely praised by the market since its launch.
ADI is one of the leading manufacturers of digital isolation technology. With its iCoupler digital isolation chip and uModule BGA digital isolation technology, it has shipped more than 3 billion isolation channels. The ADUM6421A sold by Mouser Electronics is a DC/DC switching power chip that integrates four iCoupler on-off keying (OOK) digital isolation channels and iCoupler chip-level isoPower transformer technology. Using ADI's technology, it can support small-size integrated, enhanced isolation signal and power solutions in 500mW isolated power supplies.
The ADUM6421A has a common-mode transient immunity (CMTI) of up to 100 kV/µs, meeting the requirements for reinforced isolation, and is optimized for EMI, meeting CISPR 32/EN550 32 Class B emission limits when fully loaded on a 2-layer PCB.
Miniaturization is one of the main directions of current power module technology development. Miniaturization can reduce the occupied PCB area, reduce the weight of the equipment, and facilitate the integration of more functions in the equipment. The miniaturization of power chips or modules is of great significance to hardware engineers. However, miniaturization means high power density, that is, more power output in the same volume, which requires the power chip to have higher conversion efficiency and better heat dissipation performance.
Researchers meet the need for miniaturization of power supplies by applying technologies in four directions. First, better semiconductor processes are used to reduce the heat emitted by the chip itself; second, innovative circuit topologies and structures are used to reduce the requirements for external passive components, so that small-size passive components can also meet system requirements; third, innovative packaging technology is used to enhance the heat dissipation capacity of power chips; and finally, heterogeneous integration is used to reduce parasitic parameters and chip size.
ADI has outstanding performance in these areas. A typical example is the improvement of the power supply solution for low-voltage and high-current FPGA chips. In 2010, ADI needed 12 LTM4601s for an FPGA that required 100A current; by 2012, 4 LTM4620s were connected in parallel to output 100A current; the LTM4630 launched in 2014 only required 3 pieces in parallel to output 100A current; the LTM4650 launched in 2016 only required 2 pieces to meet the 100A current supply. But this is not the point. Now ADI has launched the LTM4700, which has achieved a single-chip power supply of 100A.
The evolution of the LTM series is particularly evident in the packaging technology, from ordinary plastic packaging to adding metal heat dissipation substrates, and then to developing its own component packaging (Component on Package, CoP for short).
CoP
is
a three-dimensional packaging technology that places the inductor of the high-power power chip on the top of the chip through packaging technology, exposing it to the airflow as a heat sink, which not only does not occupy PCB area, but also improves heat dissipation performance, thereby increasing power density.
Electronic devices are changing with each passing day, driving the continuous development of power supply technology. The common requirements of electronic devices for safety, energy saving, portability, ease of use and performance are fed back to power supply chips, requiring chip developers to develop green power supply chips with higher performance, lower power consumption and more intelligence to achieve higher power density, longer battery life, lower EMI interference, better power supply and signal integrity, and safety under high voltage, which drives power supply chip developers to continue to innovate. In turn, the continuous innovation of power supply chip technology also gives electronic equipment developers more incentives and resources, and gives engineers more choices when designing power supplies, so that these new technologies can be applied to the extreme.
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