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Infineon Technologies Launches World's Thinnest Silicon Power Wafer, Pushing Technology Limits and Improving Energy Efficiency

Latest update time:2024-10-31
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• Infineon is the first company to master the handling and processing technology of 20μm ultra-thin power semiconductor wafers;

• Cutting substrate resistance in half by reducing wafer thickness, thereby reducing power losses by more than 15%;

• The new technology can be used in a variety of applications, including Infineon’s AI-enabled roadmap;

• Ultra-thin wafer technology has been approved and released to customers.


Following the announcement of the world’s first 300mm gallium nitride (GaN) power semiconductor wafer and the completion of the world’s largest 200mm silicon carbide (SiC) power semiconductor wafer fab in Kulim, Malaysia , Infineon Technologies has once again achieved a new milestone in semiconductor manufacturing technology. Infineon has made a breakthrough in handling and processing the thinnest silicon power wafer in history, which has a diameter of 300mm and a thickness of 20μm. This is only one-quarter the thickness of a human hair and half the thickness of the current state-of-the-art 40-60μm wafers.






Jochen Hanebeck

Infineon Technologies CEO

The world's thinnest silicon wafer demonstrates our commitment to creating extraordinary value for our customers by advancing the development of power semiconductor technology. Infineon's breakthrough in ultra-thin wafer technology marks an important step forward in energy-efficient power solutions and helps us realize the full potential of the global trend of decarbonization and digitalization. With this technological breakthrough, Infineon has mastered the three semiconductor materials of Si, SiC and GaN, consolidating our leading edge in industry innovation.



This innovation will help significantly improve the energy efficiency, power density and reliability of power conversion solutions for AI data centers, as well as consumer, motor control and computing applications. Compared with solutions based on traditional silicon wafers, halving the wafer thickness can reduce substrate resistance by 50%, thereby reducing power losses in the power system by more than 15%. For high-end AI server applications, increased current will drive up energy demand, so reducing the voltage from 230V to processor voltage below 1.8V is particularly important for power conversion. Ultra-thin wafer technology greatly promotes vertical power transmission design based on vertical trench MOSFET technology. This design achieves a highly close connection with the AI ​​chip processor, reducing power losses while improving overall efficiency.





Adam White

Infineon Technologies

President of Power and Sensor Systems Division

New ultra-thin wafer technologies drive our ambition to power different types of AI server configurations, from the grid to the core, in the most energy-efficient way. As the energy requirements of AI data centers rise significantly, energy efficiency becomes increasingly important. This presents Infineon with an opportunity to grow rapidly. Based on mid-double-digit growth rates , we expect our AI business revenues to reach EUR 1 billion within the next two years.


Since the thickness of the metal stack that fixes the chip on the wafer is greater than 20μm, Infineon's engineers had to establish an innovative and unique wafer grinding method to overcome the technical barriers of reducing the wafer thickness to 20μm. This greatly affects the handling and processing of the back side of the thin wafer. In addition, technology and production-related challenges such as wafer warpage and wafer separation also have a significant impact on the back-end assembly process to ensure wafer stability and first-class robustness. The 20μm thin wafer process is based on Infineon's existing manufacturing technology, ensuring that the new technology can be seamlessly integrated into existing high-volume Si production lines without additional manufacturing complexity, thereby guaranteeing the highest possible yield and supply security.


The technology has been recognized and applied in Infineon's integrated intelligent power stage (DC-DC converter), and has been delivered to the first customers. At the same time, the technology also has a strong patent portfolio related to 20μm wafer technology, reflecting Infineon's innovative leadership in semiconductor manufacturing. With the current development of ultra-thin wafer technology, Infineon predicts that in the next three to four years, the existing traditional wafer technology will be replaced by alternative technologies for low-voltage power converters. This breakthrough further consolidates Infineon's unique position in the market. Infineon currently has a comprehensive product and technology portfolio covering Si, SiC and GaN-based devices, which are key factors in promoting low-carbonization and digitalization.


From November 12 to 15, Infineon will publicly present the first ultra-thin silicon wafer at electronica 2024 in Munich (Hall C3, Booth 502).


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