In-depth analysis of the prospects of wafer-level packaging
Latest update time：2020-09-10
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Wafer level packaging (WLP) has attracted great interest and attention over the past decade as the semiconductor industry continues to drive higher performance generation after generation dominated by the mobile and consumer sectors, but continues to slow down as Moore's Law becomes increasingly difficult below 7 nanometers. As a result, the back-end packaging process has become increasingly important to meet the demand for low latency, higher bandwidth and cost-effective semiconductor devices.
This article explores the current market dynamics of WLCSP and fan-out packaging, examines the supply chain and key players involved in the WLCSP and fan-out markets, and attempts to provide future growth scenarios for wafer-level packaging, especially fan-out packaging. It also describes the driving forces of panel-level packaging and the current state of panel-level manufacturing among key players. This article will also explore new trends such as chiplets. At the same time, how IDMs including Intel and TSMC will continue to use fan-out processes as an enabler of heterogeneous solutions in the coming years, constantly pushing new boundaries.
FO and WLCSP packages
FO (Fan-Out) packaging started a few years ago with limited applications, but as a mature and reliable packaging technology, it has played a key role and deserved position in the field of high-end packaging. In fact, TSMC's InFO form factor took FO technology to new heights in 2015/2016 as Apple launched the A10 using the InFO-PoP method. FO packaging is mainly used in mobile and consumer products, and also has some applications in automotive radar. FO packaging is expected to gain widespread adoption in the next few years with the popularization of 5G, AI and autonomous driving flights, and the revenue brought by FO packaging is expected to reach US$2.5 billion by 2025. The WLCSP packaging market has also discovered a new "M series" that provides 6-sided die protection and has excellent board-level reliability (BLR) performance.
WLCSP Fan-In Packaging Market Dynamics
WLCSP packaging generated record revenue of $2 billion in 2019 and is expected to grow at a CAGR of 5% over the next five years (Figure 1). Smartphone OEMs continue to use WLCSP packaging for many chips such as PMICs, audio codec modules, RF transceivers, NFC controllers, connectivity modules, and many other applications. The WLCSP market is dominated by top OSATs such as ASE, Amkor, JCET, SPIL, followed by foundries such as TSMC, Samsung, Chinese OSATs, and a few IDMs. Driven by the growing demand for IoT and the adoption of more WLCSP packaging in the smartphone ecosystem, the top OSATs will continue to invest in more WLCSP and evolving infrastructure in 2020.
Figure 1. Fan-out package and WLCSP revenues, 2015-2019.
The outlook for this market remains strong during 2020-2025 as the newly adopted WLCSP form factor has been widely adopted in all smartphones. The WLCSP market is expected to grow to $3 billion by 2025. Packaging suppliers will continue to enjoy strong demand for 8-inch and 12-inch WLCSP across a variety of devices. WLCSP has become the mainstream “workhorse” packaging technology for mobile/consumer applications, providing the lowest cost solution compared to substrate-based packaging. RF components are also likely to transition to WLCSP type platforms over the next five years as it can reduce module costs overall through substrate optimization compared to wire bond configurations.
Fan-Out Packaging Market Dynamics
FOWLP packaging generated $1.3 billion in revenue in 2019 as the semiconductor industry recovered in the second half of 2019, which brought very strong OSAT demand (Figure 1). FO (Fan-out) packaging revenue declined slightly in 2019 compared to 2018, however, TSMC continued to support Apple application processors through InFO packaging and InFO-AiP packaging, which was launched in February 2020 to support 5G Apple phones.
The outlook for fan-out packaging remains healthy for 2020-2025 (Figure 2). Over the next five years, fan-out packaging is expected to grow at a CAGR of 11%, driven primarily by TSMC’s provision of InFO to the iOS ecosystem and the increased adoption of HDFO (High-Density Fan Out) designs by top mobile OEMs other than Apple in the coming years. The fan-out packaging market is expected to grow to $2.5 billion by 2025. Fan-out packaging configurations continue to compete with more traditional fcCSP-based designs as the latter offer a more reliable and lower-cost solution. Fan-out remains a niche technology with only major players such as TSMC, Samsung, ASE, JCET, and PTI (Figure 3). The adoption of 5G mmWave may help increase the volume of fan-out packaging, especially for the OSAT segment (RF segment). Core FO is growing slowly and is expected to remain stable as fan-in WLCSP and more reliable fcCSP configurations can meet many device requirements. As more mobile phone OEMs look to adopt HDFO platforms for application processors, fan-out capex is expected to grow, and TSMC capex is expected to surge
Figure 2. Evolution of the fan-out market, 2019-2025
Figure 3. Fan-out packaging market dynamics per market.
Panel-level market dynamics
FO-PLP technology is mainly driven by Semco, Samsung Electronics, PTI and ASE/Deca Technologies, with about 3% of packages being produced on panel lines in 2019, and is expected to grow to 7.5% by 2025, while Semco sold its FO PLP production line to Samsung Electronics in mid-2019.
Samsung will optimize the recently purchased Semco production line to add other packaging product lines on the fan-out configuration, and may see an inflection point in 2020. With ASE adopting a high-quality panel production line of 600×600, the OSAT industry is in the process of reducing panel size. Samsung Electronics supports its Galaxy Watch with the PLP platform and is likely to expand it to mobile platform devices and compete with TSMC for back-end solutions. Samsung will continue to make full use of the panel product line purchased from Semco and plans to use fan-out equipment in 2021 and beyond, and will no longer use Semco panel product lines, and focus on mid-range smartphone APUs. PTI has committed to significant capital expenditures in 2020 to expand panel manufacturing based on fan-out packaging with a focus on more decentralized multi-chip integration.
TSMC goes all-in
TSMC made an unprecedented $1.5 billion CapEx investment in 2020 in advanced packaging business, specifically targeting SoIC, InFO variants and CoWoS product lines, with the InFO (PoP/AiP/OS/MS) product line estimated to be worth about $300 million. TSMC began producing Apple APUs on the InFO platform in 2016, which broke the inherent balance of the supply chain as substrate suppliers and OSATs lost that Apple APU business to TSMC. TSMC continues to "get involved" in the traditional OSAT business of Apple APU PoP assembly and antenna packaging modules for 5G Apple phones with its InFO product line. Intel recently launched the Co-EMIB architecture using a "chiplet" type face-to-face interconnect scheme, which will be used in mobile and high-performance applications.
Wafer-level packaging supply chain
The WLCSP packaging market is dominated by top OSATs such as ASE, Amkor, JCET, and SPIL (Figure 4). 8-inch WLCSP continues to maintain high production volumes because many devices do not require highly advanced silicon nodes. WLCSP services include bump and die handling services, and testing can be included as a package deal. Most WLCSP packages use a 1L RDL structure, while 2L RDL configurations are rarely used. Over the next five years, top OSATs will see higher demand for WLCSP packaging as more feature devices convert to WLCSP platforms in the smartphone ecosystem and as IoT infrastructure grows rapidly.
Figure 4. WLSCP and fan-out packaging market dynamics for each player.
In contrast, the supply chain for fan-out packaging remains complex (Figure 4). TSMC continues to enjoy its superior position in providing high-density solutions such as InFO-PoP for Apple AP solutions, and continues to improve its processes and packaging products from generation to generation. In this regard, TSMC is taking market share from OSATs and substrate suppliers for Apple AP devices as well as the built-in antenna (AiP) devices planned to be used in Apple 5G phones later this year.
TSMC's progress in providing "one-stop" services has an impact on the business of substrate and OSAT players, indicating that the line between wafer fabs and OSATs continues to blur. Samsung remains another high-density fan-out technology player, which recently acquired Semco's PLP series and is most likely to be used to produce more fan-out high-integration packages for its smartphone segment.
ASE and JCET remain strong OSAT players in fan-out packaging solutions, offering multi-chip SiP-type packages and ASE's FoCoS product lineup for high-end applications. As more and more mobile phone OEMs plan to adopt this platform in the next few years, PTI will continue to invest in its PLP series products in order to enter the high-density application field. Figure 5 shows the fan-out packaging platforms selected by leading semiconductor companies and their main features.
Figure 5. Fan-out packaging platforms and key features selected by leading semiconductor companies.
Outlook for New Fan-Out Packaging
In the past and coming years, we expect novel fan-out package form factors such as the Deca M series (Figure 6) with 6S (6-side) protection design to be popular for its superior BLR (board-level reliability). TSMC’s InFO product family will also include InFO-PoP, InFO-MS and InFO-OS, as well as InFO-AiP packages. TSMC’s advanced packaging roadmap provides a glimpse into the future as it plans to use SoIC (System on Integrated Chip) as the next integrated solution for mobile and high-end applications.
Figure 6. ASE/Deca M-Series fan-out technology for sidewall protection.
TSMC successfully manufactured APUs on the InFO-PoP platform from 2016 to 2019. In the coming years, as the chiplet design approach and heterogeneous integration trends develop, TSMC plans to implement SoIC (System on Integrated Chip) on various mobile and high-end applications to achieve the performance required for new applications in 5G computing and HPC. TSMC SoIC design has the potential to swallow up other business from OSAT for FO-SiP applications.
In addition to increasing iOS ecosystem content through InFO packaging, TSMC is also likely to adopt more mobile phone OEM customers for APU modules through fan-out platforms as the competition for miniaturization and higher bandwidth continues. In summary, with its mature InFO product lineup and increased investment in SoIC packaging infrastructure in the next 3-5 years as the chiplet paradigm shifts,
Fan-out packaging enables chiplets and heterogeneous integration
Looking ahead to the next five years, the heterogeneous integration trend will intensify to support the 5G, AI and IoT megatrends. Fan-out processes and technologies are the foundation of advanced back-end integration and will be the driving force for heterogeneous integration of future chiplet types. Intel, TSMC and Samsung will continue to drive technological advancements to enable various future 3D IC heterogeneous integration packaging designs. In the race to achieve high-density heterogeneous integration, OSATs will also enhance their ability to compete in this lucrative high-end advanced packaging market in the coming years.
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