Article count:25239 Read by:103424336

Account Entry

What to do when processors and SRAM become more and more expensive?

Latest update time:2023-03-17 14:01
    Reads:

Like every other industry we assume, the IT industry is always in a state of dealing with the next bottleneck. It’s a perpetual game of whack-a-mole – a pessimist might say it’s Sisyphean at its core, an optimist might try not to overthink it and deal with the systemic issues at hand. But what do you do with a hammer when all the gophers rear their heads at the same time?


Or, to put it more bluntly, as the title above suggests, what do we do when processors and their SRAM and main memory are no longer as cheap as they have been for decades? How can system architects and those who build and buy data center infrastructure not become frustrated in this post-Moore's Law era?


Over the past month, we've seen the same flattened curve over and over again, and it's starting to feel haunting or damning. For years now, as we've been aware of the slowdown of Moore's Law and the challenges it poses to system architecture in many ways—compute, memory, storage, networking, you name it—we've been warning that transistors will start to become The more expensive. But more strikingly, at least through late 2022 and early 2023, we're seeing a series of stories suggesting that the cost of compute units, fast SRAM memory, and slow DRAM memory remains stable and won't fall over time. . it should.


The first time we saw this flattening of the curve emerge in recent weeks was a report by WikiChip Fuse at the International Electronic Devices Conference in December, which outlined the difficulties of shrinking SRAM cell area:



Now this chart doesn't talk about cost explicitly, but SRAM represents 30% to 40% of the transistors on a typical compute engine, SRAM represents a large portion of the cost of the chip, and we all know the cost started a few years ago, starting around the 7nm node With each generation of technology, transistors continue to improve. Whether SRAM transistor density can be increased remains to be seen - the folks at WikiChip Fuse seem to think Taiwan Semiconductor Manufacturing will pull a rabbit out of a hat and get better than the projected 5% density increase with its 3nm 3NE Craftsmanship. If it can do that, we still think the cost of SRAM is likely to go up, not down. If it does go down, miraculously, it won't go down by much.


And then today, this diagram comes from Dan Ernst, formerly a senior technical architect at Cray and now part of the Microsoft Azure Future Architecture team, who posted this diagram on his Twitter feed as a shoutout to SemiAnalysis's Dylan Patel Response to an article. Here is a chart posted by Ernst on DRAM pricing:



This is what Patel suggested to Ernst:



A day after we did our own analysis of the performance and price/performance of the Intel Xeon and Yu Pingyan:



High-core-count chips follow this less aggressive price curve, and a combination of opportunistic pricing and higher packaging costs and lower yields forces Intel to still charge a premium for high-core-count Xeon SP processors:



Depending on where you draw the line and the chip architecture and implementation, Moore's Law price growth stopped around 2016. It's hard to tell using Intel's numbers, as it effectively had a monopoly on x86 computing until 2018 or 2019. But it's clear Intel isn't trying to lower compute costs from 2009 to 2023 here as it was when it moved from the 45-nanometer "Nehalem" Xeon E5500 to the 10-nanometer "Sapphire Rapids" Xeon SP.


As we like to point out, Moore's Law isn't about shrinking transistors, it's about reducing the cost of transistors so that more transistors running faster and faster can be used to solve more complex and higher-capacity computing problems. Economics drive the IT industry - density per se does not. Creating compute or memory density by itself doesn't help much, but creating cheaper, denser devices has done wonders in six decades of commercial computing.


What do we do when this has stopped and probably has stopped in all respects? What happens when the cost per bit of switching ASICs goes up? We know that day is coming. What do we do when compute engines have to get hotter, bigger, and more expensive? Do we just keep getting more and more parallelism and building bigger, more expensive systems?

*Disclaimer: This article is original by the author. The content of the article is the personal opinion of the author. The reprinting by Semiconductor Industry Watch is only to convey a different point of view. It does not mean that Semiconductor Industry Watch agrees or supports the view. If you have any objections, please contact Semiconductor Industry Watch.


Today is the 3286th content shared by "Semiconductor Industry Observation" with you. Welcome to pay attention.

Recommended reading

Semiconductor Industry Watch

" Semiconductor's First Vertical Media "

Real-time professional original depth


Identify the QR code , reply to the keywords below, and read more

Wafers | Integrated circuits | Equipment | Automotive chips | Storage | TSMC | AI | Packaging

Reply Submit an article and read "How to Become a Member of "Semiconductor Industry Watch""

Reply Search and you can easily find other articles you are interested in!

 
EEWorld WeChat Subscription

 
EEWorld WeChat Service Number

 
AutoDevelopers

About Us About Us Service Contact us Device Index Site Map Latest Updates Mobile Version

Site Related: TI Training

Room 1530, Zhongguancun MOOC Times Building,Block B, 18 Zhongguancun Street, Haidian District,Beijing, China Tel:(010)82350740 Postcode:100190

EEWORLD all rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2021 EEWORLD.com.cn, Inc. All rights reserved