Fabs are accelerating their entry into the market, and the packaging and testing industry is on the rise again
Latest update time：2020-12-30
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Source: The content comes from " Caixun ", thank you.
According to Taiwan media Caixun.com, Taiwan's semiconductor industry is reaching a new turning point. Starting from 2020, packaging and testing will become the new star of the semiconductor industry. Companies that catch up with the trend are already "making a lot of money". This will be Taiwan's next shining global number one.
The packaging industry, which was previously seen as a low-profit, low-growth industry, has changed since 2020. The revenue and profit of many packaging and testing plants hit a record high since their establishment in 2020. At the same time, led by TSMC, Taiwan's packaging and testing supply chain is carrying out the largest expansion plan in recent years. "I have been in the industry for 27 years, and this is the first time I have heard all the big bosses of packaging and testing say that the next 10 years will be good," said a manager of an equipment factory.
ASE is the largest manufacturer in Taiwan
At the end of December, our interview team visited various places in Taiwan to observe the expansion of factories. In Miaoli, TSMC's fifth advanced packaging plant is under construction, and the entire base is about the size of two football fields. In Kaohsiung, ASE Technology Holding, the world's largest packaging and testing plant, not only built a 5G unmanned factory, but also announced that it would build another 7 unmanned factories, and even challenge Samsung's scale. In the future, it will hire 20,000 more people in Taiwan to become Taiwan's largest employer.
Walking into the Hukou Industrial Zone next to Hsinchu Science Park, the new plant building of Chipbond Technology, the world's ninth largest packaging and testing company, has entered the completion stage; not far away, Powertech, the world's fifth largest packaging and testing company, has also bought TSMC's old solid-state lighting plant and is preparing to convert it into a production base for the most advanced panel-level packaging technology. Powertech CEO Hsieh Wing-ta said that the plant will be completed in the first quarter of 2021 and start trial production in 2022.
The production expansion of high-end substrates is even more rapid. "High-end substrates are in very short supply now, even TSMC is worried about the shortage of substrate supply," said a general manager of a packaging and testing plant. In Taoyuan, we also saw Xinxing's huge new plant, which is like a giant ship. The main structure has been completed and will produce the most technically difficult ABF substrates.
Not only high-end processes, but also traditional packaging companies are expanding their factories. Changke, which produces semiconductor packaging lead frames, is also building a new factory in the Kaohsiung Export Processing Zone. Chairman Huang Jianeng said: "If you place an order now, the delivery date will be half a year later." In addition, Xie Yongda also revealed that Chaofeng, a subsidiary of Powertech, "just built a factory in 2019, and it will be full in 2020. Next year and the year after, they will build another factory."
Now, the entire packaging and testing industry chain, from the highest-end wafer-level packaging to the most traditional wire-bonding packaging, is booming! Booming! Booming!
The delivery date of the popular wire rack order is scheduled to be half a year later
Brandon Prior, senior consultant of Prismark, a well-known American market research company, pointed out in an interview with this magazine that the global packaging industry, excluding testing, has a market size of US$57 billion (approximately NT$1.61 trillion); from 2019 to 2024, the global packaging market will have an annual compound growth rate of 5.6%, and "packaging will grow faster than the entire semiconductor market."
He analyzed that if we only look at advanced packaging, the current market size is about US$5.7 billion, among which flip chip packaging will grow at twice the speed of the semiconductor market; in addition, high-density fan-out packaging (wafer-level packaging) will also double in growth. He believes that even for mature wire bonding packaging processes, demand will increase, "but the annual growth rate is about 5% or less"; at the same time, most semiconductor products will not be in oversupply in the short term.
One of the reasons for the resurgence of the packaging industry is that computers are no longer just used for typing and surfing the Internet. AI and 5G have enormous demands for computing power, and semiconductor process miniaturization is becoming increasingly difficult and costly.
Over the past 30 years, miniaturization technology has been like modern alchemy, allowing the same wafer to be cut into more and better-performing dies; although the total cost has increased, the average cost of the product has been reduced because the number of dies has also increased, and the same wafer can generate several times the revenue. However, the economic benefits brought by process miniaturization have begun to change.
Advanced packaging is creating new growth momentum for wafer fabs
According to a survey by the Center for Security and Emerging Technologies (CSET) at Georgetown University, the average price of TSMC's chips has dropped significantly over the past three generations, but the average price of chips made with the latest 5-nanometer process has risen instead of falling, and is $5 more than the previous generation. The investment cost of the 5-nanometer process has nearly doubled compared to the previous generation. To manufacture 5-nanometer chips, not only expensive EUV (extreme ultraviolet) equipment is required, but each 5-nanometer chip requires up to 14 EUV mask processing.
Therefore, in order to continue to improve the performance of future chips and reduce prices, semiconductor manufacturers such as TSMC have long been developing wafer-level advanced packaging. This is because it is not cost-effective to use the most advanced process to manufacture the entire IC. The new approach is to only use the most important part of the chip to manufacture it using the most advanced process, while other minor functions, such as power management and antenna elements, continue to use the old process and are integrated into a chip through packaging technology.
TSMC Chairman Liu Deyin publicly stated in 2020 that miniaturization and 3D IC technology will enable the computing density per unit to double every two years in the future.
TSMC has been working hard for more than 10 years to develop advanced packaging technology. This story is also related to Liang Mengsong, the co-CEO of SMIC who just announced his departure. Back then, Liang Mengsong was a first-class technical expert in line width miniaturization. Liang Mengsong strived to perform well and hoped to win the position of vice president of TSMC. At that time, within TSMC, only talents who were engaged in line width miniaturization were called first-class talents.
Technology Competition Self-provided Standard Equipment
However, TSMC executives wanted Liang Mengsong to turn to research on advanced packaging to surpass Moore's Law, but this was a cold job and would not make money in the short term, so Liang Mengsong left. Unexpectedly, his colleague Yu Zhenhua took over the order to develop advanced packaging and worked hard for many years. Not only did TSMC get the exclusive Apple order because of this technology, Yu Zhenhua was promoted to vice president, and TSMC founder Morris Chang also recommended Yu Zhenhua to win the Presidential Science Award.
"In the future, wafer fabs will rely on advanced packaging to grow," industry insiders observed. Because traditional packaging is completed by wire bonding machines to bond wires one by one on the chip, and a chip can only connect hundreds or thousands of wires in series. Wafer-level advanced packaging, on the other hand, uses semiconductor manufacturing processes to connect metal contacts that can only be seen under a microscope on the wafer, connecting tens of thousands of lines in series, and the line density can be more than 10 times that of traditional packaging.
ASE Technology Holding, the global leader in packaging and testing, will naturally not miss this opportunity; however, their calculations are completely different.
"SPIL has previously set up a wafer-level packaging production line specifically for Apple, but it has almost never been filled." Industry insiders revealed that packaging plants have long seen the potential of advanced packaging, and the interior of packaging and testing plants has changed from labor-intensive production lines to high-tech factories where people wear cleanroom suits and are filled with automated equipment.
"Wafer-level packaging costs $100 for 60 or 70 chips, while traditional wire bonding processes only cost a few cents, a difference of several times," an industry insider observed. The weakness of the traditional packaging and testing industry in 3D IC packaging is that if TSMC fails in advanced packaging, it only needs to produce another wafer for the customer, but the packaging and testing factory will have to pay the market price for compensation, which is tens of thousands of dollars per wafer.
▲The 18th smart factory of ASE Technology Holding is the first smart factory to combine 5G and big data technologies.
(Photo/Reference Room)
In this competition, the advantage of the packaging and testing factories is that they have a variety of packaging and testing technologies to use, and each of them is not easy. For example, the 2.5D wafer-level packaging material standard was first proposed by ASE Technology Holding. From the cheapest wire-bonding packaging to the most expensive wafer-level packaging, the packaging and testing factories have the production capacity to provide it. Therefore, packaging factories actively develop system-level packaging (SiP), which can integrate various ICs into a wafer-sized module, providing functions that could only be achieved by a whole PCB (printed circuit board), and competing with system assembly factories such as Hon Hai for the market.
Traditional packaging and testing plants win by integrating resources
Or develop more advanced packaging technology to make advanced packaging cheaper. For example, the new technology of Powertech's new plant can use a whole panel-sized substrate to package three 12-inch wafers at a time, which is more cost-competitive than a wafer plant that only packages one wafer at a time. For applications such as antennas, Wi-Fi, and power management, traditional packaging and testing plants have advantages.
"ASE will repeat the successful model of the "Copper Wire War"." Industry insiders observed ASE's layout. In the past, gold was used as the main material for wire bonding of electronic products. Gold is soft and easy to process, but ASE had already quietly laid out the copper wire bonding process. "One year, the price of gold soared. For the same order, ASE's profit was several times that of its competitors. This battle allowed ASE to become the leader in packaging."
Seeing the business opportunities, Jiangsu Changdian of China has also invested heavily in advanced packaging technology. In addition, Hon Hai has also entered the system-level packaging market by investing in Xunxin. Facing the opponent's advance, ASE Technology Co., Ltd. has laid out an automatic factory as early as 11 years ago. The whole factory looks similar to a wafer factory, and only a few workers wearing clean clothes can be seen on the production line. Wu Tianyu once said: "The day the automated factory was completed, I laughed for a whole week." ASE Technology Co., Ltd. is ready to use automation to face the low-price competition of its competitors.
Even traditional packaging factories will grow with this trend. For example, Changke, which produces traditional lead frames, invested in building a new lead frame etching production line in Kaohsiung in 2020. Huang Jianeng, chairman of Changke, analyzed that traditional lead frames are also improving. In the past, the old lead frame technology could only make one row of pins, but now the new technology can make two rows or even more rows, which can make 200 or 300 contacts, and begin to erode the original higher-end BGA packaging market. International network communication manufacturers are now using lead frames for mid-to-high-end chips, and can also make new products that are smaller and more cost-effective than in the past. Huang Jianeng's current goal is to become the world's largest lead frame manufacturer.
New demands have triggered a comprehensive explosion of investment opportunities that cannot be hidden
"5G is definitely one of the driving forces." Huang Jianeng said that 5G is just getting started, but 5G will drive the demand for the Internet of Everything, which will increase the demand for chips and expand the market. The demand for low- and mid-end chips, which account for more than half of the entire market, will naturally increase. The continued growth in performance of traditional packaging factories such as Chaofeng also proves this phenomenon.
In the next few years, AI, 5G, the Internet of Things, and electric vehicles will stimulate more demand. After advanced packaging becomes popular, wafer fabs will erode some of the business of packaging and testing plants; but at the same time, packaging and testing plants will also take away some of the business of system assembly plants with lower costs and more efficient products.
In the next few years, the packaging and testing industry will be a cross-border melee among wafer fabs, packaging and testing plants, and system plants. There will be demands for various new materials and new equipment, and Taiwanese manufacturers will have the opportunity to take the lead. This is a major trend that Taiwan cannot miss in the next 10 years in the semiconductor industry, and it also contains many investment opportunities.
*Disclaimer: This article is originally written by the author. The content of the article is the author's personal opinion. Semiconductor Industry Observer reprints it only to convey a different point of view. It does not mean that Semiconductor Industry Observer agrees or supports this point of view. If you have any objections, please contact Semiconductor Industry Observer.
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