Cadence received TÜV SÜD’s industry’s first “Tailor-Made-TCL1” certification that fully complies with the automotive industry’s ISO 26262 standard

△ The importance of EDA in the automotive safety market continues to increase, and TÜV SÜD releases a new certification level for this purpose

△ Automotive chip design engineers can easily achieve process-level certification in the TÜV SÜD certification database

△ Published and certified PCB design and verification process documents that comply with the new version of the ISO 26262 standard; the existing customized design and verification process in the Virtuoso Liberate parameter characterization solution, as well as the documents related to the enhanced digital implementation and verification process have also been certified

As the importance of EDA solutions in the automotive safety market increases, TÜV SÜD and Cadence have reached a consensus on adding a new certification level to further assist automotive chip designers in achieving the ISO 26262 standard. Cadence's process-level certifications can be verified in the TÜV SÜD certification database.

Under the new certification system, each tool's process document toolkit will be individually certified, valid for five years. TÜV SÜD plans to review updated versions of the tool process at least every other year to ensure compliance with ISO 26262.

“The cooperation with Cadence led us to decide to establish a dedicated document certification program, so that customers who use Cadence tools from ASIL A to ASIL D can benefit greatly,” said Günter Greil, head of TÜV SÜD’s general functional safety components department. “Automotive semiconductor manufacturers, OEMs and component suppliers not only need to meet tight lead times, but also meet ISO 26262 specifications. The new document certification program can help customers reduce the time spent on tool qualification and focus more on Focus on product innovation.”

The following tools have achieved TÜV SÜD’s “Tailor-Made – TCL1” certification and have been included in the Cadence Automotive Functional Safety Toolkit:

• PCB Design and Verification Process: A new PCB design certification process for the Cadence OrCAD®, PSpice® and Allegro® product suites, including the entire process from schematic design to simulation to physical implementation and verification. The high-performance design entry, simulation and layout editing tools provided by the above suites provide design engineers with a well-integrated one-stop environment to help them safely verify circuit specifications and increase confidence.

  
  

• Analog/Mixed-Signal Design, Implementation and Verification Flow: Based on the Cadence Virtuoso® ADE product suite and Specter® circuit simulator, this flow enables transistor-level design from design and simulation to physical implementation and verification. The Cadence Virtuoso ADE Verifier integrated dashboard helps engineers easily conduct design verification to ensure that all modules comply with the overall design specifications.

  
  

• Digital design implementation and sign-off process: This process includes RTL-GDSII design implementation and sign-off. The process adds support for Cadence Virtuoso Liberate® parametric characterization solution and integrates seamlessly with 13 existing tools. These tools include: Cadence Innovus® Design Implementation System for Automotive Design Implementation and Signoff, Genus® Comprehensive Solutions, Modus® Test Solutions, Tempus® Timing Signoff Solutions, Quantus® QRC Extraction Solutions and Voltus® IC Power integrity solutions.

After evaluation, the documentation toolkit for the digital front-end design and verification process complies with the ISO 26262 specification, and certification is expected to be completed in the fourth quarter of 2017. Process document tools include a variety of content from specifications, RTL design to verification. Front-end digital tools include Cadence Genus® synthesis solutions and Conformal® logical equivalence checking. Functional and safety verification capabilities are provided by the Cadence verification suite, including Cadence JasperGold® formal verification platform, Xcelium® parallel logic simulator (will be added to the process document in the fourth quarter of 2017), Palladium® Z1 enterprise-level simulation platform, and Protium® FPGA prototype Platform, vManager® Planning and Metrics, and Indago® Debugging Platform (will be added to the process document in Q4 2017).

“Cadence’s process-level documentation toolkit is designed to help automotive suppliers more easily meet the ISO 26262 standard,” said Raja Tabet, vice president of the Emerging Technologies Group at Cadence. "Cadence pre-certified documents help customers meet the challenges they need to overcome to meet standards, and our customers appreciate the flexibility and ease of this approach. Working with TÜV SÜD, we have achieved process-level certification of Cadence documents, creating a new ' Tailor-made - The TCL1' certification mark fully demonstrates our commitment to the automotive market. Cadence is committed to supporting semiconductor manufacturers, OEMs and component suppliers to help them differentiate in the market."

About Cadence

Cadence Corporation is committed to enabling electronic systems and semiconductor companies to design innovative end products that change the way people work, live and play. Customers use Cadence's software, hardware, IP and services, covering everything from semiconductor chips to circuit board design and even entire systems, to help them deliver products to the market faster. Cadence's innovative "System Design Implementation" (SDE) strategy will help customers develop more differentiated products, whether in mobile devices, consumer electronics, cloud computing, automotive electronics, aviation, Internet of Things, industrial applications, etc. application market. Cadence was also selected as one of the "100 Best Companies to Work for in the World" by Fortune magazine. To learn more, please visit the company's website at www.cadence.com.