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How to solve the complex challenges in the era of intelligent system design? Cadence seminar tells you!

Latest update time:2019-06-03
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2019 Cadence-Intelligent System Design Technology Seminar

China’s annual traveling exhibition is next week

At the beginning of June, the Cadence Technology Exhibition will travel to Xi'an, Chengdu, Shanghai, Shenzhen, and Beijing, and sincerely invites IC experts in the industry. Topics include: digital design implementation and sign-off tools, high-speed PCB design, system-level packaging, system simulation, targeting advanced Innovative EDA design methods under the process, as well as full system-level verification process and technical solutions for Billion Gate designs such as AI chips, automotive electronics, cloud servers and mobile terminals


In addition to technology sharing on intelligent system design, the following two latest products were fully unveiled:


1

System analysis tool Clarity3D field solver

Cadence's latest system analysis tool, Clarity3D field solver, has the most advanced distributed parallel computing technology and effectively solves electromagnetic (EM) challenges in complex 3D structure design such as chip, package, PCB, connector and cable design. , providing true 3D analysis support to any engineer with desktop, high-performance computing (HPC) or cloud computing resources.

2

Protium X1 enterprise-grade prototype verification platform

Cadence Protium X1 data center-level prototype verification platform, which is the first FPGA prototype system optimized for data centers, provides multi-MHz high-speed transmission rates for early software development, hardware and software regression, and complete system verification. The Protium X1 architecture is suitable for a variety of design sizes and application scenarios, from billion-gate AI and 5G chips to single FPGA IoT chips and IP modules.

The conference is free to attend, seats are limited, so register as soon as possible!

Conference consultation: event_cn@cadence.com

Xi'an Railway Station

Time: June 11, 2019 (Tuesday)

Location: Shangri-La Hotel, Xi'an, 2nd floor

Chengdu Station

Time: June 13, 2019 (Thursday)

Location: Chengdu’s first Renaissance Hotel, 3rd floor

Shanghai Station

Time: June 17, 2019 (Monday)

Location: Evergreen Laurel Hotel Pudong, Shanghai, 2nd floor

Shenzhen Station

Time: June 19, 2019 (Wednesday)

Location: The Westin Hotel Shenzhen Yitian, 4th floor

Beijing Station

Time: June 21, 2019 (Friday)

Location: Beijing Liting Huayuan Hotel, 3rd floor


Conference registration

Please click on the following QR code to complete online registration:

meeting agenda


Xi'an Station-June 11

Sub-Forum 1: Digital Design and Signoff

Sub-Forum 2: Allegro PCB & Package

Sub-forum 3: System Analysis

Chengdu Station-June 13

Sub-forum 1: Custom IC/Analog

Sub-Forum 2: Allegro PCB & Package

Sub-forum 3: System Analysis

Sub-forum 4: Verification Suite

Shanghai Station-June 17

Sub-Forum 1: Verification Suite

Sub-Forum 2: Allegro PCB & Package

Sub-forum 3: System Analysis

Shenzhen Station-June 19

Sub-forum 1: Custom IC/Analog

Sub-Forum 2: Allegro PCB & Package

Sub-forum 3: System Analysis

Beijing Station-June 21

Sub-forum 1: Custom IC/Analog

Sub-Forum 2: Allegro PCB & Package

Sub-forum 3: System Analysis

Sub-forum 4: Verification Suite


Thanks to the following special sponsors


Xi'an Railway Station

Shanghai Station

Shenzhen Station

Beijing Station

Chengdu Station


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