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Heavy! Cadence's world's first machine learning core EDA automation tool Cerebrus is launched

Latest update time:2021-07-23
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Cadence launches revolutionary new product Cerebrus - completely based on machine learning, providing best-in-class productivity and result quality, expanding digital design leadership

Executive summary

Cerebrus uses unique machine learning ML technology to promote Cadence RTL-to-signoff implementation process, providing up to 10 times productivity and increasing design implementation PPA results by 20%

Adopt reusable and portable reinforcement learning model to improve efficiency every time you use it

Enables more efficient local and cloud computing resource management compared to traditional manual design processes

Significantly improve PPA and productivity in multiple process nodes and multiple end applications, including consumer electronics, ultra-large-scale computing, 5G communications, automotive electronics and mobile devices, etc.



Shanghai, China, July 23, 2021 - Cadence Electronics (Cadence, Inc., NASDAQ: CDNS) today announced the launch of Cadence ® Cerebrus Intelligent Chip Explorer - the first innovative machine learning (ML)-based design tool that can Expand and automate the digital chip design process, allowing customers to efficiently achieve demanding chip design goals. The powerful combination of Cerebrus and Cadence RTL-to-signoff flows supports high-end process chip designers, CAD teams and IP developers, increasing engineering productivity up to 10x compared to manual methods while increasing functionality by up to 10 times. Improve power, performance and area (PPA) results by 20%.


With the addition of Cerebrus to Cadence's broad digital product portfolio, Cadence can now offer the industry's most advanced machine learning-based digital workflow, from synthesis to implementation and signoff.


The new tool enables cloud computing services in partnership with multiple leading cloud service providers to leverage highly scalable computing resources to quickly meet design requirements for a wide range of markets including consumer electronics, hyperscale computing, 5G communications, automotive and mobile. For more information about Cerebrus, visit www.cadence.com/go/cerebruspr.


Fully automated EDA tool


Cerebrus offers customers the following advantages:

Enhanced machine learning: Quickly find process solutions that engineers might not try or explore, improving PPA and productivity.

Machine learning model reuse: Allows design learning experiences to be automatically applied to future designs, reducing time to better results.

Improve productivity: Let one engineer automatically optimize the complete RTL-to-GDS process for multiple blocks at the same time, improving the work efficiency of the entire design team.

Large-scale distributed computing: Provides scalable local or cloud-based design exploration for faster process optimization.

Easy-to-use interface: Powerful user management tools support interactive results analysis and run management to gain in-depth understanding of design metrics.


Machine learning core


"Before this, there was no automated way to help the design team reuse the design knowledge accumulated in the past. Each new project would spend too much time on learning from experience again, which would also affect the project's profitability," Dr. Chin-Chi Teng, senior vice president and general manager of the Digital and Signoff Division at Cadence, said, " The launch of Cerebrus marks a disruptive innovation in the EDA industry. Digital chip design tools with machine learning as the core will Giving engineering teams more opportunities to have a greater impact on projects because they can say goodbye to repetitive, manual processes As the industry continues to move toward advanced process nodes and designs continue to increase in size and complexity, Cerebrus helps designers. Achieve PPA goals more efficiently.”


Cerebrus is part of the broader Cadence digital workflow and works with Genus Synthesis Solution, Innovus Implementation System, Tempus Timing Signoff Solution, Joules RTL Power Solution, Voltus IC Power Integrity SolutionIC power integrity solution and Pegasus Verification System tool platforms seamlessly integrate and cooperate to provide customers with rapid design convergence and better predictability. This new tool and broader design process supports Cadence's Intelligent System Design ™ strategy , which aims to drive pervasive intelligence and enable design excellence .


client feedback


Satoshi Shibatani, Director of Digital Design Technology Department, Renesas Shared R&D EDA Department:

“In order to maximize the efficient use of the latest process nodes to create new designs, our engineering team needs to continuously develop advanced digital design implementation processes. For more efficient product development, it has become critical for the design implementation process to be automatically optimized. With its innovative machine learning capabilities and the Cadence RTL-to-signoff tool flow, Cerebrus can provide automated process optimization and layout planning optimization, improving design performance by more than 10%. In view of the successful experience of the project, we will develop it in the latest design project. using this tool process.”


Sangyun Kim, Vice President of Design Technology, Samsung Foundry:

“As Samsung Foundry continues to deploy the most advanced process nodes, it is important to ensure that our Design Technology Co-Optimization (DTCO) program is efficient and we are always looking for innovative ways to exceed PPA goals in silicon implementation. As we work with As part of a long-term partnership with Cadence, Samsung Foundry has used Cerebrus and Cadence's digital design implementation flow in multiple applications, reducing power consumption by more than 8% in just a few days on some very critical modules. , which used to take months to achieve manually. In addition, we are using Cerebrus for automatic floor planning power distribution network selection, which improves the final design timing by more than 50% due to Cerebrus and the digital implementation process . With outstanding PPA results and significant productivity gains, this solution has become a valuable addition to our DTCO program.”



About Cadence

With more than 30 years of expertise in computing software, Cadence is a key leader in the electronic design industry. Based on the company's intelligent system design strategy, Cadence is committed to providing software, hardware and IP products to help electronic design concepts become reality. Cadence's customers are the most innovative companies around the world, delivering everything from chips and circuit boards to the most dynamic application markets such as consumer electronics, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and medical. Systematic excellence in electronics. Cadence has been ranked among Fortune magazine's 100 Best Companies to Work For for seven consecutive years. For more information, please visit the company's website at cadence.com.



© 2021 Cadence Design Systems, Inc. All rights reserved. All rights reserved worldwide. Cadence, the Cadence logo and other Cadence marks listed at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other marks are the property of their respective owners.



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