EEWORLDEEWORLDEEWORLD

Part Number

Search

EQVE12B1C1H-26.5626MTR

Description
VCXO, CLOCK, LVDS OUTPUT
CategoryPassive components    oscillator   
File Size937KB,13 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance
Download Datasheet Parametric View All

EQVE12B1C1H-26.5626MTR Overview

VCXO, CLOCK, LVDS OUTPUT

EQVE12B1C1H-26.5626MTR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid7043080611
Reach Compliance Codecompliant
Other featuresENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR, 14 INCH
Maximum control voltage2.75 V
Minimum control voltage
maximum descent time0.5 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate30 ppm
frequency stability50%
JESD-609 codee4
linearity10%
Installation featuresSURFACE MOUNT
Number of terminals6
Nominal operating frequency26.5626 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeLVDS
Output load100 OHM
physical size7.0mm x 5.0mm x 1.8mm
longest rise time0.5 ns
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry60/40 %
Terminal surfaceNickel/Gold (Ni/Au)

EQVE12B1C1H-26.5626MTR Preview

Ecliptek | EQVE12 Series Oscillator
http://www.ecliptek.com/oscillators/EQVE12/
Log On
| 714-433-1200 |
Email Customer Support
Home
Products
Quick Quote
My Parts List
Site Map
Contact Us
EQVE12 Series Oscillator
Voltage Controlled Quartz Crystal Clock Oscillators VCXO LVDS (DS) 2.5Vdc 6 Pad 5.0mm x 7.0mm Ceramic Surface Mount
(SMD)
2011/65 +
2015/863
168 SVHC
Revision A 07/30/2014
Electrical Specifications
Nominal Frequency
10.000MHz to 625.000MHz
Some frequencies within this range may not be available.
Frequency Tolerance/Stability
Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency
Stability over the Operating Temperature Range, Supply Voltage
Change and Output Load Change
±50ppm Maximum
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
±2ppm Maximum First Year, ±10ppm/10 Years Maximum
2.5V
DC
±5%
25mA Maximum
1.425V
DC
Typical
1.075V
DC
Typical
50mV
DC
Maximum
200mV
DC
Minimum, 350mV
DC
Typical, 454mV
DC
Maximum
1.125V Minimum, 1.250V Typical, 1.375V Maximum
Measured at 50% of Waveform
50 ±10(%)
50 ±5(%)
Measured at 20% to 80% of Waveform
500pSec Maximum
50mV
DC
Maximum
100 Ohms Between Output and Complementary Output
LVDS
Inclusive of all conditions: Calibration Tolerance (at 25°C), Frequency
Stability over the Operating Temperature Range, Supply Voltage
Change, Output Load Change, Shock, Vibration, and 10 Year Aging
over the Control Voltage (Vc)
±30ppm Minimum
±50ppm Minimum
Test Condition for APR
0.2V
DC
to 2.3V
DC
0.0V
DC
to V
DD
+0.25V
DC
Operating Temperature Range
Aging at 25°C
Supply Voltage
Input Current
Output Voltage Logic High (V
OH
)
Output Voltage Logic Low (V
OL
)
Differential Output Error (dVod)
Differential Output Voltage (Vod)
Offset Voltage (Vos)
Duty Cycle
Rise Time/Fall Time
Offset Error (dVos)
Load Drive Capability
Output Logic Type
Absolute Pull Range
Control Voltage
Control Voltage Range
1 of 13
28-Jan-2016 2:50 PM
Ecliptek | EQVE12 Series Oscillator
http://www.ecliptek.com/oscillators/EQVE12/
Linearity
Transfer Function
Modulation Bandwidth
5% Typical, 10% Maximum
Positive Tranfer Characteristic
Measured at -3dB, Vc = 1.25V
DC
10kHz Minimum
500kOhms Minimum
10 A Maximum
Click to Open Phase Noise Table
Output Enable (OE)
90% of V
DD
Minimum or No Connect to Enable Output and
Complementary Output
10% of V
DD
Maximum to Disable Output and Complementary Output
(High Impedance)
100nSec Maximum
50nSec Maximum
Without Load (Pin 2 = Ground)
15mA Maximum
Click to Open RMS Phase Jitter Table
0.2pSec Typical
2pSec Typical
3pSec Maximum
25pSec Maximum
-55°C to +125°C
10mSec Maximum
Input Impedance
Input Leakage Current
Phase Noise
Output Control Function
Output Control Input Voltage Logic High
(Vih)
Output Control Input Voltage Logic Low
(Vil)
Output Enable Time
Output Disable Time
Output Enable Current
RMS Phase Jitter
Period Jitter (Deterministic)
Period Jitter (Random)
Period Jitter (RMS)
Period Jitter (pk-pk)
Storage Temperature Range
Start Up Time
2 of 13
28-Jan-2016 2:50 PM
Ecliptek | EQVE12 Series Oscillator
http://www.ecliptek.com/oscillators/EQVE12/
Phase Noise
All Values are Typical
Nominal Frequency: 10MHz to 50MHz
Offset
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
Nominal Frequency: 50.000001MHz to 100MHz
Offset
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
Nominal Frequency: 100.000001MHz to 156.249999MHz
Offset
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
Nominal Frequency: 156.25MHz to 212.5MHz
Offset
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
Nominal Frequency: 212.500001MHz to 500MHz
Offset
10Hz
100Hz
1kHz
Phase Noise
-56dBc/Hz
-95dBc/Hz
-100dBc/Hz
Phase Noise
-58dBc/Hz
-86dBc/Hz
-110dBc/Hz
-116dBc/Hz
-117dBc/Hz
-136dBc/Hz
-146dBc/Hz
-148dBc/Hz
Phase Noise
-57dBc/Hz
-86dBc/Hz
-114dBc/Hz
-121dBc/Hz
-122dBc/Hz
-141dBc/Hz
-151dBc/Hz
-153dBc/Hz
Phase Noise
-58dBc/Hz
-90dBc/Hz
-118dBc/Hz
-125dBc/Hz
-126dBc/Hz
-145dBc/Hz
-155dBc/Hz
-157dBc/Hz
Phase Noise
-64dBc/Hz
-96dBc/Hz
-124dBc/Hz
-131dBc/Hz
-132dBc/Hz
-149dBc/Hz
-157dBc/Hz
-159dBc/Hz
3 of 13
28-Jan-2016 2:50 PM
Ecliptek | EQVE12 Series Oscillator
http://www.ecliptek.com/oscillators/EQVE12/
10kHz
100kHz
1MHz
10MHz
20MHz
Nominal Frequency: 500.000001MHz to 625MHz
Offset
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
20MHz
-106dBc/Hz
-107dBc/Hz
-126dBc/Hz
-136dBc/Hz
-137dBc/Hz
Phase Noise
-54dBc/Hz
-84dBc/Hz
-97dBc/Hz
-104dBc/Hz
-105dBc/Hz
-124dBc/Hz
-134dBc/Hz
-136dBc/Hz
4 of 13
28-Jan-2016 2:50 PM
Ecliptek | EQVE12 Series Oscillator
http://www.ecliptek.com/oscillators/EQVE12/
RMS Phase Jitter
Fj=12kHz to 20MHz (Random)
Nominal Frequency Range
10MHz to 50MHz
50.000001MHz to 100MHz
100.000001MHz to 625MHz
RMS Phase Jitter
1.5pSec Maximum
1.4pSec Maximum
1.3pSec Maximum
5 of 13
28-Jan-2016 2:50 PM
TMS320C6678 Evaluation Module
The TMS320C6678 Lite Evaluation Module (EVM) is an easy-to-use, cost-effective development tool that helps developers quickly start designing with the C6678 or C6674 or C6672 multicore DSPs. The EVM i...
Jacktang DSP and ARM Processors
Power Line Communication Simulation Reference Design for RS-485
The reference design establishes a simulation model for RS-485 communications over power cables. This simulation model can be used to evaluate the feasibility of implementing RS485 communications at a...
Jacktang Analogue and Mixed Signal
Buck circuit ripple test oscilloscope settings problem
Buck circuit ripple test oscilloscope settings problem The buck circuit outputs 3.6V, and the output ripple is tested with an oscilloscope. When the oscilloscope is set to 500mV/div, the ripple voltag...
dianhang Test/Measurement
[RISC-V MCU CH32V103 Review] RTC Electronic Clock
[i=s]This post was last edited by jennyzhaojie on 2021-2-6 16:48[/i]The CH32V103 is equipped with an RTC timer, which can be combined with the OLED display to form an RTC electronic clock. The main pr...
jennyzhaojie Domestic Chip Exchange
2596 ADJ proportional resistance selection
When I was doing maintenance today, I found that the ADJ output was connected to the ground and the multimeter was beeping. I checked and found that my proportional resistors were too small. One was 1...
tangwei8802429 Analog electronics
Reference design of a true wireless headset charging box with ultra-low standby power consumption
Wireless headphones have been popular in the market for more than 10 years, and the trend of replacing wired headphones is very obvious. However, most traditional wireless headphones only separate the...
Jacktang RF/Wirelessly

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号