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PN3639

Description
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN
Categorysemiconductor    Discrete semiconductor   
File Size519KB,4 Pages
ManufacturerCentral Semiconductor
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PN3639 Overview

300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN

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PN3639 MPSA25 MPSA45 MPSA75 MPSA76 MPSD04 MPSD54 MPSH11 MPSL01 MPSL51
Description 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN RF SMALL SIGNAL TRANSISTOR 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN
Is it lead-free? - Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? - incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Maker - Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor
Parts packaging code - TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 - TO-92 TO-92
package instruction - TO-92, 3 PIN CYLINDRICAL, O-PBCY-T3 TO-92, 3 PIN TO-92, 3 PIN TO-92, 3 PIN TO-92, 3 PIN - CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3
Contacts - 3 3 3 3 3 3 - 3 3
Reach Compliance Code - unknow not_compliant _compli not_compliant _compli unknow unknow not_compliant _compli
Maximum collector current (IC) - 0.5 A 0.3 A 0.5 A 0.5 A 0.5 A 0.5 A - 0.15 A 0.6 A
Configuration - DARLINGTON SINGLE DARLINGTON DARLINGTON DARLINGTON DARLINGTON SINGLE SINGLE SINGLE
Minimum DC current gain (hFE) - 10000 50 10000 10000 1000 1000 60 50 40
JEDEC-95 code - TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92
JESD-30 code - O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3
JESD-609 code - e0 e0 e0 e0 e0 e0 e0 e0 e0
Number of components - 1 1 1 1 1 1 1 1 1
Number of terminals - 3 3 3 3 3 3 3 3 3
Maximum operating temperature - 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape - ROUND ROUND ROUND ROUND ROUND ROUND ROUND ROUND ROUND
Package form - CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Polarity/channel type - NPN NPN PNP PNP NPN PNP NPN NPN PNP
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
surface mount - NO NO NO NO NO NO NO NO NO
Terminal surface - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form - THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal location - BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Transistor component materials - SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON
Nominal transition frequency (fT) - 125 MHz 20 MHz 125 MHz 125 MHz 100 MHz 100 MHz 650 MHz 60 MHz 60 MHz
Maximum power dissipation(Abs) - - 0.625 W - 0.625 W 1.5 W 0.625 W 0.35 W 0.625 W 0.625 W

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