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MPSD54

Description
300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN
CategoryDiscrete semiconductor    The transistor   
File Size519KB,4 Pages
ManufacturerCentral Semiconductor
Download Datasheet Parametric Compare View All

MPSD54 Overview

300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN

MPSD54 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCentral Semiconductor
Parts packaging codeTO-92
package instructionTO-92, 3 PIN
Contacts3
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum collector current (IC)0.5 A
ConfigurationDARLINGTON
Minimum DC current gain (hFE)1000
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
JESD-609 codee0
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
Maximum power dissipation(Abs)0.625 W
Certification statusNot Qualified
surface mountNO
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
Nominal transition frequency (fT)100 MHz

MPSD54 Related Products

MPSD54 MPSA25 MPSA45 MPSA75 MPSA76 MPSD04 MPSH11 MPSL01 MPSL51 PN3639
Description 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN RF SMALL SIGNAL TRANSISTOR 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN 300,000 SYSTEM GATE 1.8V FPGA - NOT RECOMMENDED for NEW DESIGN
Is it lead-free? Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead -
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible -
Maker Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor Central Semiconductor -
Parts packaging code TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 - TO-92 TO-92 -
package instruction TO-92, 3 PIN TO-92, 3 PIN CYLINDRICAL, O-PBCY-T3 TO-92, 3 PIN TO-92, 3 PIN TO-92, 3 PIN - CYLINDRICAL, O-PBCY-T3 CYLINDRICAL, O-PBCY-T3 -
Contacts 3 3 3 3 3 3 - 3 3 -
Reach Compliance Code unknow unknow not_compliant _compli not_compliant _compli unknow not_compliant _compli -
Maximum collector current (IC) 0.5 A 0.5 A 0.3 A 0.5 A 0.5 A 0.5 A - 0.15 A 0.6 A -
Configuration DARLINGTON DARLINGTON SINGLE DARLINGTON DARLINGTON DARLINGTON SINGLE SINGLE SINGLE -
Minimum DC current gain (hFE) 1000 10000 50 10000 10000 1000 60 50 40 -
JEDEC-95 code TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 TO-92 -
JESD-30 code O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 O-PBCY-T3 -
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0 -
Number of components 1 1 1 1 1 1 1 1 1 -
Number of terminals 3 3 3 3 3 3 3 3 3 -
Maximum operating temperature 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C 150 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY -
Package shape ROUND ROUND ROUND ROUND ROUND ROUND ROUND ROUND ROUND -
Package form CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL CYLINDRICAL -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
Polarity/channel type PNP NPN NPN PNP PNP NPN NPN NPN PNP -
Maximum power dissipation(Abs) 0.625 W - 0.625 W - 0.625 W 1.5 W 0.35 W 0.625 W 0.625 W -
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified -
surface mount NO NO NO NO NO NO NO NO NO -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE -
Terminal location BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
Transistor component materials SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON SILICON -
Nominal transition frequency (fT) 100 MHz 125 MHz 20 MHz 125 MHz 125 MHz 100 MHz 650 MHz 60 MHz 60 MHz -
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