74ALVCH16373DGG,11 datasheet, PDF

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74ALVCH16373DGG,11: Descriptionlatches IC transp latch 16bit D; Categorylogic logic; File Size125KB，18 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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latches IC transp latch 16bit D

74ALVCH16373DGG,11 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconduc
Maker	NXP
Parts packaging code	TSSOP
package instruction	6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48
Contacts	48
Manufacturer packaging code	SOT362-1
Reach Compliance Code	compli
series	ALVC/VCX/A
JESD-30 code	R-PDSO-G48
JESD-609 code	e4
length	12.5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	3.3 ns
propagation delay (tpd)	5.9 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.1 mm

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74ALVCH16373

2.5 V/3.3 V 16-bit D-type transparent latch; 3-state

Rev. 6 — 10 July 2012

Product data sheet

1. General description

The 74ALVCH16373 is 16-bit D-type transparent latch featuring separate D-type inputs for

each latch and 3-state outputs for bus oriented applications.

Incorporates bus hold data inputs which eliminate the need for external pull-up or

pull-down resistors to hold unused inputs.

One latch enable (LE) input and one output enable (OE) are provided per 8-bit section.

The 74ALVCH16373 consists of 2 sections of eight D-type transparent latches with 3-state

true outputs. When LE is HIGH, data at the nDn inputs enter the latches. In this condition

the latches are transparent, therefore a latch output will change each time its

corresponding D-input changes.

When LE is LOW, the latches store the information that was present at the nDn inputs at a

set-up time preceding the LOW-to-HIGH transition of LE. When OE is LOW, the contents

of the eight latches are available at the outputs. When OE is HIGH, the outputs go to the

high-impedance OFF-state. Operation of the OE input does not affect the state of the

latches.

2. Features and benefits



Wide supply voltage range from 1.2 V to 3.6 V

Complies with JEDEC standard JESD8-B

CMOS low power consumption

MULTIBYTE flow-through standard pin-out architecture

Low inductance multiple V

and GND pins for minimum noise and ground bounce

Direct interface with TTL levels

All data inputs have bus hold

Output drive capability 50



transmission lines at 85

C

Current drive

24

mA at V

= 3.0 V

74ALVCH16373DGG,11 Related Products

	74ALVCH16373DGG,11	74ALVCH16373DL,118	74ALVCH16373DL,112
Description	latches IC transp latch 16bit D	latches 3.3V 16-bit D trans	latches 3.3V 16-bit D trans
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc
Maker	NXP	NXP	NXP
Parts packaging code	TSSOP	SSOP	SSOP
Contacts	48	48	48
Manufacturer packaging code	SOT362-1	SOT370-1	SOT370-1
Reach Compliance Code	compli	compli	compli
series	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A
JESD-30 code	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
JESD-609 code	e4	e4	e4
length	12.5 mm	15.875 mm	15.875 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	1	1	1
Number of digits	8	8	8
Number of functions	2	2	2
Number of ports	2	2	2
Number of terminals	48	48	48
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SSOP	SSOP
Encapsulate equivalent code	TSSOP48,.3,20	SSOP48,.4	SSOP48,.4
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
method of packing	TAPE AND REEL	TAPE AND REEL	TUBE
Peak Reflow Temperature (Celsius)	260	260	260
power supply	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Su	3.3 ns	3.3 ns	3.3 ns
propagation delay (tpd)	5.9 ns	3.9 ns	3.9 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	2.8 mm	2.8 mm
Maximum supply voltage (Vsup)	3.6 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	1.2 V	2.3 V	2.3 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	30	30
width	6.1 mm	7.5 mm	7.5 mm
package instruction	6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48	-	PLASTIC, SSOP3-48
Is it Rohs certified?	-	conform to	conform to
Other features	-	CAN ALSO OPERATES AT 3 TO 3.6 V RANGE	CAN ALSO OPERATES AT 3 TO 3.6 V RANGE

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