Q33210B70013714 datasheet, PDF

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Q33210B70013714: DescriptionCMOS Output Clock Oscillator,; CategoryPassive components oscillator; File Size268KB，5 Pages; ManufacturerSeiko Epson Corporation

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Q33210B70013714 Overview

CMOS Output Clock Oscillator,

Q33210B70013714 Parametric

Parameter Name	Attribute value
Maker	Seiko Epson Corporation
Reach Compliance Code	unknown
Other features	STANDBY; ENABLE/DISABLE FUNCTION; TR, 7 INCH
maximum descent time	3 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
Installation features	SURFACE MOUNT
Nominal operating frequency	33.33 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS
Output load	15 pF
physical size	2.5mm x 2.0mm x 0.8mm
longest rise time	3 ns
Maximum supply voltage	3.6 V
Minimum supply voltage	2.7 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %

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Clock OSC

SG-210SCB

SG-210SCB 33.330000 MHz L

Product name

Product Number / Ordering code

Q33210B700137xx

Please refer to the 8.Packing information about xx (last 2 digits)

Output waveform CMOS

Pb free / Complies with EU RoHS directive

Reference weight Typ. 15 mg

1.Absolute maximum ratings

Parameter

Symbol

Maximum supply voltage

Storage temperature

Input voltage

Min.

-0.3

-40

-0.3

Typ.

Max.

+125

Vcc+0.3

Unit

ºC

Conditions / Remarks

Storage as single product

ST terminal

Vcc-GND

T_stg

Vin

2.Specifications(characteristics)

Parameter

Symbol

Output frequency

Supply voltage

Operating temperature

Frequency tolerance

Current consumption

Stand-by current

Symmetry

Output voltage

Output load condition

Input voltage

Rise time

Fall time

Start-up time

Jitter

Min.

2.7

-40

-50

0.9Vcc

0.8Vcc

-3

Typ.

33.330000

3.3

2.3

2.2

2.7

0.24

-96

-125

-142

-153

-159

-162

Max.

3.6

+85

1.0

0.1Vcc

0.2Vcc

Unit

MHz

ºC

x10

-6

µA

Conditions / Remarks

T_use

No load condition

ST = GND

50% Vcc Level L_CMOS=<15pF

IOH=-1mA

IOL=1mA

Vcc

T_use

f_tol

Icc

I_std

SYM

L_CMOS

t_str

RMS

p-p

acc

CMOS Load

ST terminal

dBc/Hz

x10

-6

0.2Vcc to 0.8Vcc Level, L_CMOS=15pF

t = 0 at 0.9Vcc

Deterministic Jitter Vcc=3.3

Random Jitter Vcc=3.3V

δ(RMS of total distribution) Vcc=3.3V

Peak to Peak Vcc=3.3V

Accumulated Jitter(δ) n=2 to 50000

cycles

Off set Frequency: 12kHz to 20MHz Vcc=3.3V

Phase jitter

Phase noise

L(f)

Off set 10Hz Vcc=3.3V

Off set 100Hz Vcc=3.3V

Off set 1kHz Vcc=3.3V

Off set 10kHz Vcc=3.3V

Off set 100kHz Vcc=3.3V

Off set 1MHz Vcc=3.3V

@+25ºC first year

Frequency aging

f_age

1 Page

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