935282747112 datasheet, PDF - EEWORLD Datasheet

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935282747112: Description8 I/O, PIA-GENERAL PURPOSE, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16; CategoryThe embedded processor and controller Microcontrollers and processors; File Size164KB，27 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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935282747112 Overview

8 I/O, PIA-GENERAL PURPOSE, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16

935282747112 Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	TSSOP,
Reach Compliance Code	unknown
ECCN code	EAR99
JESD-30 code	R-PDSO-G16
length	5 mm
Number of I/O lines	8
Number of ports	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Maximum seat height	1.1 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	2.3 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	4.4 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE

935282747112 Preview

PCA9672

Remote 8-bit I/O expander for Fm+ I

C-bus with interrupt and

reset

Rev. 02 — 6 July 2007

Product data sheet

1. General description

The PCA9672 provides general purpose remote I/O expansion for most microcontroller

families via the two-line bidirectional bus (I

C-bus) and is a part of the Fast-mode Plus

family.

The PCA9672 is a drop-in upgrade for the PCF8574 providing higher Fast-mode Plus

(Fm+) I

C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM

dimming of LEDs, higher I

C-bus drive (30 mA versus 3 mA) so that many more devices

can be on the bus without the need for bus buffers, higher total package sink capacity

(200 mA versus 100 mA) that supports having all LEDs on at the same time and more

device addresses (16 versus 8) are available to allow many more devices on the bus

without address conﬂicts.

The difference between the PCA9672 and the PCF8574 is that the A2 address pin is

replaced by the RESET input on the PCA9672.

The device consists of an 8-bit quasi-bidirectional port and an I

C-bus interface. The

PCA9672 has low current consumption and include latched outputs with 25 mA high

current drive capability for directly driving LEDs.

The PCA9672 possesses an interrupt line (INT) that can be connected to the interrupt

logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can

inform the microcontroller if there is incoming data on its ports without having to

communicate via the I

C-bus.

The internal Power-On Reset (POR), hardware reset pin (RESET), or Software Reset

sequence initializes the I/Os as inputs.

2. Features

1 MHz I

C-bus interface

Compliant with the I

C-bus Fast and Standard modes

SDA with 30 mA sink capability for 4000 pF buses

2.3 V to 5.5 V operation with 5.5 V tolerant I/Os

8-bit remote I/O pins that default to inputs at power-up

Latched outputs with 25 mA sink capability for directly driving LEDs

Total package sink capability of 200 mA

Active LOW open-drain interrupt output

16 programmable slave addresses using 2 address pins

Readable device ID (manufacturer, device type, and revision)

NXP Semiconductors

PCA9672

Remote 8-bit I/O expander for Fm+ I

C-bus with interrupt and reset

Low standby current

−40 °C

to +85

°C

operation

ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115, and 1000 V CDM per JESD22-C101

Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA

Packages offered: SO16, TSSOP16, HVQFN16

3. Applications

LED signs and displays

Servers

Industrial control

Medical equipment

PLCs

Cellular telephones

Gaming machines

Instrumentation and test measurement

4. Ordering information

Table 1.

Type

number

PCA9672BS

Ordering information

Topside

mark

672

Package

Name

HVQFN16

Description

plastic thermal enhanced very thin quad

ﬂat package; no leads; 16 terminals;

body 3

0.85 mm

plastic small outline package; 16 leads;

body width 7.5 mm

plastic thin shrink small outline package;

16 leads; body width 4.4 mm

Version

SOT758-1

PCA9672D

PCA9672D SO16

TSSOP16

SOT162-1

SOT403-1

PCA9672PW PCA9672

PCA9672_2

Product data sheet

Rev. 02 — 6 July 2007

2 of 27

NXP Semiconductors

PCA9672

Remote 8-bit I/O expander for Fm+ I

C-bus with interrupt and reset

5. Block diagram

PCA9672

INT

AD0

AD1

INTERRUPT

LOGIC

LP FILTER

SCL

SDA

INPUT

FILTER

C-BUS

CONTROL

SHIFT

8 BITS

I/O

PORT

P0 to P7

RESET

POWER-ON

RESET

write pulse

read pulse

002aac321

Fig 1. Block diagram of PCA9672

write pulse

trt(pu)

data from Shift Register

power-on reset

read pulse

100

µA

P0 to P7

data to Shift Register

002aac109

to interrupt logic

Fig 2. Simpliﬁed schematic diagram of P0 to P7

PCA9672_2

Product data sheet

Rev. 02 — 6 July 2007

3 of 27

NXP Semiconductors

PCA9672

Remote 8-bit I/O expander for Fm+ I

C-bus with interrupt and reset

6. Pinning information

6.1 Pinning

AD0

AD1

RESET

002aac322

16 V

15 SDA

14 SCL

13 INT

12 P7

11 P6

10 P5

AD0

AD1

RESET

002aac323

16 V

15 SDA

14 SCL

13 INT

12 P7

11 P6

10 P5

PCA9672D

PCA9672PW

Fig 3. Pin conﬁguration for SO16

16 AD1

15 AD0

terminal 1

index area

Fig 4. Pin conﬁguration for TSSOP16

13 SDA

12 SCL

11 INT

10 P7

14 V

RESET

PCA9672BS

002aac325

Transparent top view

Fig 5. Pin conﬁguration for HVQFN16

6.2 Pin description

Table 2.

Symbol

AD0

AD1

RESET

PCA9672_2

Pin description

SO16, TSSOP16

HVQFN16

[1]

address input 0

address input 1

reset input (active LOW)

quasi-bidirectional I/O 0

quasi-bidirectional I/O 1

quasi-bidirectional I/O 2

quasi-bidirectional I/O 3

supply ground

quasi-bidirectional I/O 4

quasi-bidirectional I/O 5

quasi-bidirectional I/O 6

Description

Product data sheet

Rev. 02 — 6 July 2007

4 of 27

NXP Semiconductors

PCA9672

Remote 8-bit I/O expander for Fm+ I

C-bus with interrupt and reset

Pin description

…continued

SO16, TSSOP16

HVQFN16

quasi-bidirectional I/O 7

interrupt output (active LOW)

serial clock line

serial data line

supply voltage

Description

Table 2.

Symbol

INT

SCL

SDA

[1]

HVQFN package die supply ground is connected to both the V

pin and the exposed center pad. The V

pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and

board-level performance, the exposed pad needs to be soldered to the board using a corresponding

thermal pad on the board, and for proper heat conduction through the board thermal vias need to be

incorporated in the PCB in the thermal pad region.

7. Functional description

Refer to

Figure 1 “Block diagram of PCA9672”.

7.1 Device address

Following a START condition, the bus master must send the address of the slave it is

accessing and the operation it wants to perform (read or write). The address of the

PCA9672 is shown in

Figure 6.

Slave address pins AD1 and AD0 choose 1 of 16 slave

addresses. To conserve power, no internal pull-up resistors are incorporated on AD1 and

AD0. Address values depending on AD1 and AD0 can be found in

Table 3 “PCA9672

address map”.

Remark:

When using the PCA9672 reserved I

C-bus addresses must be used with

caution since they can interfere with:

•

“reserved for future use” I

C-bus addresses (0000 011, 1111 101, 1111 110,

1111 111)

•

slave devices that use the 10-bit addressing scheme (1111 0xx)

•

High speed mode (Hs-mode) master code (0000 1xx)

slave address

A0 R/W

programmable

002aab636

Fig 6. PCA9672 address

The last bit of the ﬁrst byte deﬁnes the operation to be performed. When set to logic 1 a

read is selected, while a logic 0 selects a write operation.

When AD1 and AD0 are held to V

or V

, the same address as the PCF8574 with A2

held to V

is applied.

PCA9672_2

Product data sheet

Rev. 02 — 6 July 2007

5 of 27

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	935282747112	935282745118	935282747118	935282746512	935282746518
Description	8 I/O, PIA-GENERAL PURPOSE, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	8 I/O, PIA-GENERAL PURPOSE, PQCC16, 3 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT758-1, HVQFN-16	8 I/O, PIA-GENERAL PURPOSE, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16	8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT162-1, SOP-16	8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT162-1, SOP-16
Maker	NXP	NXP	NXP	NXP	NXP
package instruction	TSSOP,	HVQCCN,	TSSOP,	SOP,	SOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G16	S-PQCC-N16	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16
length	5 mm	3 mm	5 mm	10.3 mm	10.3 mm
Number of I/O lines	8	8	8	8	8
Number of ports	1	1	1	1	1
Number of terminals	16	16	16	16	16
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	HVQCCN	TSSOP	SOP	SOP
Package shape	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE
Maximum seat height	1.1 mm	1 mm	1.1 mm	2.65 mm	2.65 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	2.3 V	2.3 V	2.3 V	2.3 V	2.3 V
Nominal supply voltage	3 V	3 V	3 V	3 V	3 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	NO LEAD	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.5 mm	0.65 mm	1.27 mm	1.27 mm
Terminal location	DUAL	QUAD	DUAL	DUAL	DUAL
width	4.4 mm	3 mm	4.4 mm	7.5 mm	7.5 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE

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