EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

74LVC2G02DP

Description
Dual 2-input NOR gate
Categorylogic    logic   
File Size81KB,16 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74LVC2G02DP Overview

Dual 2-input NOR gate

74LVC2G02DP Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSOIC
package instruction3 MM, PLASTIC, SOT505-2, TSSOP-8
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
seriesLVC/LCX/Z
JESD-30 codeS-PDSO-G8
JESD-609 codee4
length3 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNOR GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.16
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su6.2 ns
propagation delay (tpd)11.2 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3 mm

74LVC2G02DP Related Products

74LVC2G02DP 74LVC2G02 74LVC2G02GT 74LVC2G02DC 74LVC2G02_08 74LVC2G02GD 74LVC2G02GM
Description Dual 2-input NOR gate Dual 2-input NOR gate Dual 2-input NOR gate Dual 2-input NOR gate Dual 2-input NOR gate Dual 2-input NOR gate Dual 2-input NOR gate
Is it Rohs certified? conform to - conform to conform to - conform to conform to
Maker NXP - NXP NXP - NXP NXP
Parts packaging code SOIC - SON TSSOP - SON QFN
package instruction 3 MM, PLASTIC, SOT505-2, TSSOP-8 - 1 X 1.95 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT833-1, SON-8 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8 - 3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8
Contacts 8 - 8 8 - 8 8
Reach Compliance Code compli - compli compli - compli compli
series LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z
JESD-30 code S-PDSO-G8 - R-PDSO-N8 R-PDSO-G8 - R-PDSO-N8 S-PQCC-N8
JESD-609 code e4 - e3 e4 - e4 e4
length 3 mm - 1.95 mm 2.3 mm - 3 mm 1.6 mm
Load capacitance (CL) 50 pF - 50 pF 50 pF - 50 pF 50 pF
Logic integrated circuit type NOR GATE - NOR GATE NOR GATE - NOR GATE NOR GATE
MaximumI(ol) 0.024 A - 0.024 A 0.024 A - 0.024 A 0.024 A
Humidity sensitivity level 1 - 1 1 - 1 1
Number of functions 2 - 2 2 - 2 2
Number of entries 2 - 2 2 - 2 2
Number of terminals 8 - 8 8 - 8 8
Maximum operating temperature 125 °C - 125 °C 125 °C - 125 °C 125 °C
Minimum operating temperature -40 °C - -40 °C -40 °C - -40 °C -40 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP - VSON VSSOP - VSON HVQCCN
Encapsulate equivalent code TSSOP8,.16 - SOLCC8,.04,20 TSSOP8,.12,20 - SOLCC8,.11,20 LCC8,.06SQ,20
Package shape SQUARE - RECTANGULAR RECTANGULAR - RECTANGULAR SQUARE
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing TAPE AND REEL - TAPE AND REEL TAPE AND REEL - TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 - 260 260 - 260 260
power supply 3.3 V - 3.3 V 3.3 V - 3.3 V 3.3 V
Prop。Delay @ Nom-Su 6.2 ns - 6.2 ns 6.2 ns - 6.2 ns 6.2 ns
propagation delay (tpd) 11.2 ns - 11.2 ns 11.2 ns - 11.2 ns 11.2 ns
Certification status Not Qualified - Not Qualified Not Qualified - Not Qualified Not Qualified
Schmitt trigger NO - NO NO - NO NO
Maximum seat height 1.1 mm - 0.5 mm 1 mm - 0.5 mm 0.5 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V 5.5 V - 5.5 V 5.5 V
Minimum supply voltage (Vsup) 1.65 V - 1.65 V 1.65 V - 1.65 V 1.65 V
Nominal supply voltage (Vsup) 3.3 V - 3.3 V 3.3 V - 3.3 V 3.3 V
surface mount YES - YES YES - YES YES
technology CMOS - CMOS CMOS - CMOS CMOS
Temperature level AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD - Tin (Sn) NICKEL PALLADIUM GOLD - NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING - NO LEAD GULL WING - NO LEAD NO LEAD
Terminal pitch 0.65 mm - 0.5 mm 0.5 mm - 0.5 mm 0.5 mm
Terminal location DUAL - DUAL DUAL - DUAL QUAD
Maximum time at peak reflow temperature 30 - 30 30 - 30 30
width 3 mm - 1 mm 2 mm - 2 mm 1.6 mm
Discussion on the Working Principle of UWB Technology
Know this: Ultra-Wideband (UWB) is the best location tracking technology and you should use it. That's it. Thanks for reading. Of course, we are just kidding. We can say that UWB is the best and most ...
兰博 RF/Wirelessly
Why digital engineers don’t believe in EMC
I recently attended a local (Seattle) meeting of the IEEE Electromagnetic Compatibility (EMC) Society, which is not where I live, but I highly recommend it to you, where you can learn more about the b...
1234 Analog electronics
The flag bit has been cleared before the general interrupt is turned on, but the interrupt still occurs. How to solve it?
As the title says, I used external interrupt 1, and then used it somewhere in the program __disable_irq(); // Disable the general interrupt. . . . . . EXTI_ClearITPendingBit(EXTI_Line1); //Clear inter...
z45217 stm32/stm8
Keysight Thanksgiving Month | Oscilloscopes are being drawn every day. Recommend and share. More than 100 gifts are waiting for you!
The 5th annual Thanksgiving Month of KE has been reignited! 70 instruments and hundreds of gifts are waiting for you! Get a 200MHz oscilloscope for free every day! Daily lucky draw, recommend and shar...
EEWORLD社区 Test/Measurement
[Xianji HPM6750 Review 5] LittlevGL transplantation using SPI display
Since the board tested by the author does not have an LCD display with an RGB interface, in order to verify the LittlevGL porting task, it is displayed on the SPI display.The official has not released...
RCSN Domestic Chip Exchange
[RVB2601 Creative Application Development] Project Talk
[i=s]This post was last edited by lugl4313820 on 2022-4-2 21:47[/i][Thanks] Special thanks to @xinmeng_wit , his post [New Reminder] [Pingtou Ge RVB2601 Creative Application Development] 3. WiFi Netwo...
lugl4313820 XuanTie RISC-V Activity Zone

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号