74LVC2G02_08 datasheet, PDF - EEWORLD Datasheet

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74LVC2G02_08: DescriptionDual 2-input NOR gate; File Size81KB，16 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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74LVC2G02_08 Overview

Dual 2-input NOR gate

74LVC2G02_08 Related Products

	74LVC2G02_08	74LVC2G02	74LVC2G02GT	74LVC2G02DC	74LVC2G02GD	74LVC2G02DP	74LVC2G02GM
Description	Dual 2-input NOR gate	Dual 2-input NOR gate	Dual 2-input NOR gate	Dual 2-input NOR gate	Dual 2-input NOR gate	Dual 2-input NOR gate	Dual 2-input NOR gate
Is it Rohs certified?	-	-	conform to	conform to	conform to	conform to	conform to
Maker	-	-	NXP	NXP	NXP	NXP	NXP
Parts packaging code	-	-	SON	TSSOP	SON	SOIC	QFN
package instruction	-	-	1 X 1.95 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT833-1, SON-8	2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8	3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8	3 MM, PLASTIC, SOT505-2, TSSOP-8	1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8
Contacts	-	-	8	8	8	8	8
Reach Compliance Code	-	-	compli	compli	compli	compli	compli
series	-	-	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	-	-	R-PDSO-N8	R-PDSO-G8	R-PDSO-N8	S-PDSO-G8	S-PQCC-N8
JESD-609 code	-	-	e3	e4	e4	e4	e4
length	-	-	1.95 mm	2.3 mm	3 mm	3 mm	1.6 mm
Load capacitance (CL)	-	-	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	-	-	NOR GATE	NOR GATE	NOR GATE	NOR GATE	NOR GATE
MaximumI(ol)	-	-	0.024 A	0.024 A	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	-	-	1	1	1	1	1
Number of functions	-	-	2	2	2	2	2
Number of entries	-	-	2	2	2	2	2
Number of terminals	-	-	8	8	8	8	8
Maximum operating temperature	-	-	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-	-	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	-	VSON	VSSOP	VSON	TSSOP	HVQCCN
Encapsulate equivalent code	-	-	SOLCC8,.04,20	TSSOP8,.12,20	SOLCC8,.11,20	TSSOP8,.16	LCC8,.06SQ,20
Package shape	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE
Package form	-	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing	-	-	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	-	-	260	260	260	260	260
power supply	-	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Su	-	-	6.2 ns	6.2 ns	6.2 ns	6.2 ns	6.2 ns
propagation delay (tpd)	-	-	11.2 ns	11.2 ns	11.2 ns	11.2 ns	11.2 ns
Certification status	-	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	-	-	NO	NO	NO	NO	NO
Maximum seat height	-	-	0.5 mm	1 mm	0.5 mm	1.1 mm	0.5 mm
Maximum supply voltage (Vsup)	-	-	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	-	-	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	-	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	-	-	YES	YES	YES	YES	YES
technology	-	-	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	-	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	-	-	Tin (Sn)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
Terminal form	-	-	NO LEAD	GULL WING	NO LEAD	GULL WING	NO LEAD
Terminal pitch	-	-	0.5 mm	0.5 mm	0.5 mm	0.65 mm	0.5 mm
Terminal location	-	-	DUAL	DUAL	DUAL	DUAL	QUAD
Maximum time at peak reflow temperature	-	-	30	30	30	30	30
width	-	-	1 mm	2 mm	2 mm	3 mm	1.6 mm

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