EBD26UB8ALFA-7A datasheet, PDF

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EBD26UB8ALFA-7A: Description256MB Unbuffered DDR SDRAM DIMM; Categorystorage storage; File Size159KB，16 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en

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EBD26UB8ALFA-7A Overview

256MB Unbuffered DDR SDRAM DIMM

EBD26UB8ALFA-7A Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ELPIDA
Parts packaging code	DIMM
package instruction	DIMM, DIMM184
Contacts	184
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.75 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	133 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N184
memory density	2147483648 bit
Memory IC Type	DDR DRAM MODULE
memory width	64
Humidity sensitivity level	1
Number of functions	1
Number of ports	1
Number of terminals	184
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM184
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	225
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	4096
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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PRELIMINARY DATA SHEET

256MB Unbuffered DDR SDRAM DIMM

EBD26UB8ALFA

(32M words

64 bits, 2 Banks)

Description

The EBD26UB8ALFA is 32M words

64 bits, 2 banks

Double Data Rate (DDR) SDRAM unbuffered module,

mounted 16 pieces of 128M bits DDR SDRAM

(EDD1208ALTA) sealed in TSOP package. Read and

write operations are performed at the cross points of

the CLK and the /CLK. This high-speed data transfer

is realized by the 2 bits prefetch-pipelined architecture.

Data strobe (DQS) both for read and write are available

for high speed and reliable data bus design. By setting

extended mode register, the on-chip Delay Locked

Loop (DLL) can be set enable or disable. An outline of

the products is 184-pin socket type package (dual lead

out). Therefore, it makes high density mounting

possible without surface mount technology. It provides

common data inputs and outputs.

Decoupling

capacitors are mounted beside each TSOP on the

module board.

Features

•

184-pin socket type dual in line memory module

(DIMM)



Outline: 133.35mm (Length)

31.75mm (Height)

4.00mm (Thickness)



Lead pitch: 1.27mm

•

2.5V power supply (VDD/VDDQ)

•

SSTL-2 interface for all inputs and outputs

•

Clock frequency: 133MHz/100MHz (max.)

•

Data inputs and outputs are synchronized with DQS

•

4 banks can operate simultaneously and

independently (Component)

•

Burst read/write operation

•

Programmable burst length: 2, 4, 8



Burst read stop capability

•

Programmable burst sequence



Sequential



Interleave

•

Start addressing capability



Even and Odd

•

Programmable /CAS latency (CL): 2, 2.5

•

4096 refresh cycles: 15.6µs (4096/64ms)

•

2 variations of refresh



Auto refresh



Self refresh

Document No. E0215E10 (Ver. 1.0)

Date Published September 2001 (K)

Printed in Japan

URL: http://www.elpida.com

Elpida Memory, Inc. 2001

Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

EBD26UB8ALFA-7A Related Products

	EBD26UB8ALFA-7A	EBD26UB8ALFA-75	EBD26UB8ALFA
Description	256MB Unbuffered DDR SDRAM DIMM	256MB Unbuffered DDR SDRAM DIMM	256MB Unbuffered DDR SDRAM DIMM
Is it Rohs certified?	incompatible	incompatible	-
Maker	ELPIDA	ELPIDA	-
Parts packaging code	DIMM	DIMM	-
package instruction	DIMM, DIMM184	DIMM, DIMM184	-
Contacts	184	184	-
Reach Compliance Code	unknown	unknown	-
ECCN code	EAR99	EAR99	-
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	-
Maximum access time	0.75 ns	0.75 ns	-
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	-
Maximum clock frequency (fCLK)	133 MHz	133 MHz	-
I/O type	COMMON	COMMON	-
JESD-30 code	R-XDMA-N184	R-XDMA-N184	-
memory density	2147483648 bit	2147483648 bit	-
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	-
memory width	64	64	-
Humidity sensitivity level	1	1	-
Number of functions	1	1	-
Number of ports	1	1	-
Number of terminals	184	184	-
word count	33554432 words	33554432 words	-
character code	32000000	32000000	-
Operating mode	SYNCHRONOUS	SYNCHRONOUS	-
Maximum operating temperature	70 °C	70 °C	-
organize	32MX64	32MX64	-
Output characteristics	3-STATE	3-STATE	-
Package body material	UNSPECIFIED	UNSPECIFIED	-
encapsulated code	DIMM	DIMM	-
Encapsulate equivalent code	DIMM184	DIMM184	-
Package shape	RECTANGULAR	RECTANGULAR	-
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	-
Peak Reflow Temperature (Celsius)	225	225	-
power supply	2.5 V	2.5 V	-
Certification status	Not Qualified	Not Qualified	-
refresh cycle	4096	4096	-
self refresh	YES	YES	-
Maximum supply voltage (Vsup)	2.7 V	2.7 V	-
Minimum supply voltage (Vsup)	2.3 V	2.3 V	-
Nominal supply voltage (Vsup)	2.5 V	2.5 V	-
surface mount	NO	NO	-
technology	CMOS	CMOS	-
Temperature level	COMMERCIAL	COMMERCIAL	-
Terminal form	NO LEAD	NO LEAD	-
Terminal pitch	1.27 mm	1.27 mm	-
Terminal location	DUAL	DUAL	-
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	-

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