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Voltage controlled sawtooth oscillatorb

Source: InternetPublisher:宋元浩 Keywords: Sawtooth oscillator voltage control BSP thyristor Updated: 2020/09/02

22.<strong>Voltage Control</strong><strong>Sawtooth Oscillator</strong>b.gif

Voltage controlled sawtooth oscillatorb

First, assume that the output voltage of the comparator is the maximum negative potential. At this time, the output is connected to the inverting input terminal of the relaxation oscillator via R1, and
a positive-phase ramp voltage is generated at the output terminal of the relaxation oscillator. When the slope voltage value reaches the upper trigger point, the input terminal of the comparator also obtains the maximum positive potential
value. This positive potential causes the ramp voltage of the relaxation oscillator to gradually decrease from its highest point and change to the negative voltage direction. The ramp voltage continues to decrease in this
direction until the lower trip point of the comparator. Then the input of the comparator also drops to the maximum negative potential, and
this cycle continues to be repeated, outputting a continuous triangle wave.
    When an adjustable DC control voltage is used at the input of the relaxation oscillator, the triangle wave oscillator becomes a sawtooth wave oscillator. The voltage
control signal can be a sine wave or a non-sinusoidal wave. If the input signal terminal uses a controllable thyristor PUT in parallel with the feedback capacitor, so that each ramp
voltage is cut off at the specified level, as shown in Figure 16-22.
    First, the sawtooth oscillator starts with a negative DC input voltage - Vin producing a positive ramp at the output. When the output slope voltage of the anode of the controllable single thyristor
exceeds the gate voltage by 0.7 V, the single thyristor will trigger conduction. The gate voltage is set to a value approximately equal to the expected
peak voltage of the sawtooth waveform. When the PUT is turned on, the capacitor is rapidly discharged, as shown in Figure 16-22 (b). Because of the PUT positive-phase voltage VF,
the capacitor will not be completely discharged to zero. The discharge process continues until the current of the PUT is lower than the holding current. At this time, the single thyristor will be cut off,
and the capacitor will start charging again, thus generating a new output ramp voltage. If this cycle is repeated continuously, the output signal will be a repetitive
sawtooth waveform. The amplitude and period of the sawtooth waveform can be adjusted by changing the PUT gate voltage.


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