Domestic KD8041 integrated phase locked loop
Source: InternetPublisher:睡不醒的小壮 Keywords: Phase locked loop BSP Updated: 2020/02/26
The phase-locked loop composed of the KD8041 integrated phase-locked loop is shown in the figure. The structure of the
KD 8041 integrated phase-locked loop is shown in the circuit in the dot-dash line frame.
The phase detector is a double-balanced analog multiplier. Pins ⑦ and @ are signal input terminals. The amplitude range of the input signal is o.2~500mV. G and
CB are coupling capacitors with a capacity of 0. OIVF. ⑩ and @ are the switching signal input terminals, which are connected to the output terminal 16 of the voltage controlled oscillator through the external capacitor
C. ⑧ and ⑨ are the external terminals of the low-pass filter. Generally, proportional integral filters are used. The internal resistance is 8kfz, and the external resistance is usually
100n-lkn. cl depends on need. Al and A2 are amplifiers, used to amplify the signal after phase detection. ⑥Pin is the phase detection output. The phase detector
can also be used alone.
The voltage controlled oscillator is an emitter timing multivibrator, and its free oscillation frequency fo is determined by the timing capacitor Cr and timing resistors R1 and R2
. Usually fo is inversely proportional to CT, Ri, and R2. When Ri =Rz =lkfl, fo =200MHz. The CT unit is pF. Rt and Rz*
are generally 500n~3kfl. The tracking range becomes wider when Rz* /Ri decreases. Pin ⑩ is the output terminal of the voltage controlled oscillator.
This circuit can keep the phase tracking of the signal at pin @ of the voltage controlled oscillator output and the input signal. If the input signal is a modulated signal, pin ⑥ outputs
a demodulated signal.
A3 is an independent amplifier, and pin ② is the input terminal. R. . It is a bias resistor, usually 50ksl. ① is the output terminal. 'R; is the emitter resistance,
usually lktl. A3 can be used as an amplification of voltage-controlled oscillation signal or FM demodulation signal, and is very convenient to use.
- Why does CAN FD communication need to enable TDC for sending and receiving delay compensation? How to configure TDC and SSP in TCAN4550?
- 1W FM Broadcast Transmitter
- RX3408 FM/FSK 500~20 MHz Receiver
- MICRF011 00K 440~300 MHz Receiver/Data Demodulator
- XEl209 70~30 kHz Ultra-Low Power CMOS Transceiver
- QMR1/QMR2 AM/FM 868/433.92 MHz Receiver Module
- GPS RF front-end circuit composed of MX2740
- nRF903 GMSK/GFSK 950~430 MHz transceiver
- T5761/T5760 ASK/FSK 870~868 MHz/928~902 MHz Receiver
- F05A/B/C Series AM 433/315 MHz RF Transmitter Module
- Electronic thermometer circuit
- Rural fish farming control circuit
- Electrical schematic diagram of DC voltmeter input at non-inverting terminal
- Proportional frequency discriminator circuit
- Voltage-controlled voltage source second-order band-pass filter circuit
- Voltage controlled power supply second-order high-pass filter circuit
- color discrimination circuit
- Color display circuit
- Digital stopwatch display circuit
- Sawtooth wave generator circuit (1)