Sawtooth wave generator circuit (1)

Shown is a sawtooth wave generator composed of complementary circuits . In the figure, M is the current limiting resistor of the base of VT1,
which prevents excessive base current from flowing through the
base of transistor VT1 when it is turned on. R4 is
the leakage resistor of the collector of transistor VT2 to ensure that
When VT2 is cut off, VT1 is reliably cut off. Generally
, power island > EJ.
    When the power supply is turned on, since
there is no charge in the capacitor C, the voltage at both ends
is zero (U0-0). At this time, for the transistor
VT2, the emitter potential is zero and the base
potential is A The potential of the point, so UA > UE.
Transistor VT2 is cut off.
There is no power surge during VT1 basic transmission , and it is also in a cut-off state. Capacitor C is charged by the power supply through resistor Rs. As the charging time increases, the potential of point E also continues to rise
. When the potential of point E exceeds the potential of point A , VT2 enters the amplification area, and its collector current flows to the base of VT1 through resistor R3.
VT1 also breaks away from the cutoff and enters the amplification area. After the collector current of VT2 is amplified by VT1, it re- Feedback to the base of VT2. In this way,
the result of positive feedback forces both VT1 and VT2 to be in a saturated state. Capacitor C is discharged through saturable transistors VT1, VT2.
    As the discharge time increases, the voltage of capacitor C continues to decrease. When the voltage at point E drops to a certain value, if the parameters are selected appropriately, then
the base current of transistor VT1 is not enough to maintain the saturation of VT1, and the circuit will turn to cut-off, and VT2 will also be in a cut-off
state . The circuit enters the second cycle process. The output waveform is as shown in the figure