One of three signal switches, multi-way switch CD4027 multi-way switch

This design example uses a single-pole momentary contact switch to select one of three signal sources by scrolling through the three output states. The circuit in the attached figure includes commonly used CD4000 CM0s logic family devices, as well as a general-purpose NPN transistor. The total cost of all components is less than $1. At any point in time, only one of the three outputs CH1, CH2 or CH3 of the circuit is low level. You can use these outputs to control the gates of analog switches, relays, or JFET switches. The selected output does not change as long as the circuit is powered, making this circuit ideal for applications requiring non-volatile operation. The average quiescent current consumption of this circuit at 25°C room temperature is only about 15uA. This is also a negligible value for battery-powered circuits.

The core of the circuit is a dual JK flip-flop IC3, which forms a 2-bit ripple counter. This counter can select four signal sources without adding circuitry. Upon initial power-up, the reset circuit consisting of R1, C1, and Ic1B sets the CH1 output to a logic low level.

When the output of Ic3, pin ② and pin (14) are all logic zero, the feedback link composed of IC2A, IC2B, IC2C and IC4A pulls the base potential of Q1 to a logic high level, thus increasing the voltage of IClB. One input is pulled to a logic low level.

This action causes the counter to jump out of the 000 state and count forward to the 011 state. Components R5, C2, IC1A and the normally open momentary contact switch S1 together form a debounce switch that provides clock pulses to both parts of the counter IC3.

When the user presses S1, the counter advances to the 101 state, and presses it again to advance to the 110 state. Pressing the switch a third time will restart the cycle.

In short, IC4B decodes the 0 state of the counter and pulls CH1 low; Ic4C decodes the 10 state of the counter and pulls CH2 low; and Ic4D decodes the 3 state of the counter and pulls CH3 low. The layout of the circuit is not critical, but a low leakage capacitor should be used for C1. Unused logic inputs should be connected to corresponding ground or Vcc.