Delay light circuit using digital circuit (2)

A delay lamp circuit made of a 2-input NAND gate
digital integrated circuit. VD3, vs, (,,, C., etc. form a simple capacitor step-down half-transition rectification and voltage stabilizing circuit. After the circuit is powered on, C. A terminal is the output
The stable DC voltage around ipv supplies power to the entire controller.
    In the figure,
the ① pin of door I and the ⑤ pin of door II
are usually at the island level
"1", making them both in the open state, while the other input of
door II
The terminal is the ⑥ pin. In
the steady state, C: has been charged
, so it is also high
level "1". Therefore,
the ④ pin of the gate II output terminal is in
the low level "." state, the diode VT is cut off, and the relay K has a small action. The light E does not light up. When SB is pressed,
the power supply passes through R. to (j), causing the gate I input pin 2 to change from the original low level to the high level "1" state, and
the output changes to the low level . In the "O" state, the diode VDI is turned on, and if it is discharged through VDI. Therefore,
the other also becomes a low level "." state, and the output pin ④ becomes a high level "l" state, Linggao
l and Pingyi Rt make wr conductive, relay K is electrically closed, its combined contact k1 is closed, and lamp E is powered on
. After releasing SB, f1 T output becomes high level again "l", VD1 cuts off, f. is charged by R.,
after about 40s (determined by the wide electrical time constant of R, and (1,)), f. When the level F rises to a certain value, gate II
outputs ... Low level ".", VT is cut off, K is released, and the light E goes out.
    Gate 1, f] [I can use two intact NAND gates and two unused NAND gates in the CD1011 digital
integrated circuit . Ground all input terminals to eliminate possible interference. c. It is required to use CBB
, loov type and other polypropylene capacitors. K uses JZC-22F, DC12V small medium power electromagnetic relay.