[Evaluation of domestic FPGA Gaoyun GW1N-4 series development board]——3. Turn on a lamp hello_led

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[Evaluation of domestic FPGA Gaoyun GW1N-4 series development board]——3. Turn on a lamp hello_led [Copy link]

 

[Evaluation of domestic FPGA Gaoyun GW1N-4 series development board]——3. Turn on a lamp hello_led

Software always starts with “hello world!”, then hardware starts with “hello led” - commonly known as “turn on the light”.

How to start an FPGA project? Actually, after installing Yunyuan IDE, there are supporting documents in the installation directory. The documents are in three languages: Chinese, English, and Japanese. As a Chinese, I am more used to reading Chinese. The document path is "D (your installation drive):\Gowin\Gowin_V1.9.8.01\IDE\doc\CN".

If you want to start FPGA design, you can refer to the first document "SUG100-2.6_Gowin Yunyuan Software User Guide.pdf" in Chapter 4 "4 Yunyuan Usage" (starting from page 27). I guess you don't want to read the document, so you can also observe this post.

Open Yunyuan IDE, the Start Page will be opened by default. Click "New Project..." in the Quick Start menu.

Enter the project name "hello_led". The path can be entered directly or specified by browsing.

The device "GW1N-LV4LQ144C6I5" can be found in the three series of GWIN-4, GWIN-4B, and GWIN-4D. Be sure to choose the " GWIN-4B " corresponding to our development board.

After filtering through multiple parameters, select the device "GW1N-LV4LQ144C6I5", next

Click "Finish" to complete the project creation.

The project framework has been created, but there are no files yet.

Nowadays, many people use Verilog, but there are also old-fashioned people like me who are used to using VHDL and create a VHDL file.

Create a file named "hello_led".

A blank file "hello_led.vhd" is created, and you need to enter the function code yourself.

The contents of the "hello_led.vhd" file are as follows:

--*******************************************************************************
--*-------------------------- file ---------------                                      
--* name:  hello_led.vhd	
--* ver : A
--* date：2021-12-9
--*------------------------------------------------
--*******************************************************************************

---------- LIB  ----------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

----------ENTITY -------------------------------------------------------------
ENTITY hello_led IS
PORT (						                                                        
-------------------------------------------------------------------------------  
--系统全局时钟 CLK
-------------------------------------------------------------------------------           
    CLK_50M:  	IN  STD_LOGIC;	--50MHz系统时钟
                       
-------------------------------------------------------------------------------  
--系统全局复位 RESET
------------------------------------------------------------------------------- 
    NRESET:   IN  STD_LOGIC;
				
-------------------------------------------------------------------------------  
--系统状态指示灯
------------------------------------------------------------------------------- 
    LED:			OUT  STD_LOGIC_VECTOR(4 DOWNTO 1));
-------------------------------------------------------------------------------

END hello_led;

-----------ARCHITECTURE-------------------------------------------------------

ARCHITECTURE MY_CODE OF hello_led IS
	
-----------------------------------------------------------------------
    SIGNAL	 COUNTER:       integer range 0 to 50000000;

--**********************************************************************************
--*****   
--**********************************************************************************
BEGIN

LED <=  (OTHERS => '0') WHEN (COUNTER < 25000000) ELSE
        (OTHERS => '1');

PROCESS(NRESET,CLK_50M)
BEGIN
	IF (NRESET = '0') THEN
        COUNTER <= 0;
	ELSIF (RISING_EDGE(CLK_50M)) THEN
        IF (COUNTER < 50000000-1) THEN
            COUNTER <= COUNTER + 1;
        ELSE
            COUNTER <= 0;
        END IF;
	END IF;
		
END PROCESS;

END MY_CODE;

As a test project, the code is relatively simple and does not require much explanation. A counter and LED status flip .

Switch to the "Process" window, right-click the "Synthesize" item, and select "Run" to synthesize the project code and prepare for pin allocation.

After the synthesis is completed, a green check mark will appear in front of it, and there will be corresponding prompts in the console window.

Right-click the "FloorPlanner" item in the resource allocator and select "Run" to execute.

The resource allocator window pops up. Switch to the IO constraint "IO Constraints" and fill in the pin number in "Location".

To do this, you need to refer to the user manual "DK_MINI_GW1N-LV4LQ144C6I5_V1.1.pdf" or the original diagram to assign the clock, reset, and LED pins.

After assigning the pins, save the settings.

At the same time, you can also see the .cst file under the project, which can be double-clicked to open. It is the pin assignment information in plain text. You can also modify or add pin assignment information directly in the .cst file.

In the "Process" window, perform layout and routing. In the "Place & Route" item, right-click and pop up the menu. There are 4 items to choose from. Choose whichever you like.

After the layout and routing is completed, a green check mark will appear in front of "Place & Route". Double-click "Program Device" to open the programmer window to program the device.

The project has automatically set some corresponding options by default. The .fs file is the target file to be downloaded to the FPGA online.

Connect the development board to the USB port of the host computer via a USB cable and turn on the power switch.

If you use the programmer for the first time, you may need to set up the USB downloader.

Open "USB Cable Setting" and click "Query" to query the connected downloader. If there are multiple hardware downloaders connected, you need to select the downloader corresponding to the development board and save the settings.

Download the target configuration file .fs to the FPGA online SRAM program. There is a progress bar during the download process.

The download is complete and there is a corresponding message prompt.

The program running effect is shown in the figure below, 4 LEDs flash on and off alternately at the same time. (The lights in the gif image flash faster, and the actual interval between on and off is 1s)

soso

The steps are very detailed.