Device and PA circuit-level verification of high-power GaN model library
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Modelithics and Qorvo are collaborating to expand the latest high-accuracy models for GaN power transistors, which are available to designers free of charge. The existing and under-development GaN model library supports the simulation-based design flow of power amplifiers (PAs) with output power requirements ranging from 5W to 500W. This article provides an overview of the library content, features and devices, as well as circuit-level "closed-loop" PA verification of the new models. ( j. R/ I7 O% ?( V
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qMicrowave power amplifier design has been a hot research and development topic for many years. The reason why this topic can attract attention and continue to develop is that it combines new applications with challenging requirements. At the same time, these technologies have been changing over the years, from silicon to GaAs and then to GaN (with a small number of applications returning to silicon). GaN has developed into the absolute technology winner for high power/high frequency applications, and the global GaN device and GaN power amplifier markets have received considerable investment and product updates are very rapid. 1 m5 S% A, E$ u
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the past, microwave power amplifier design has been done by a number of specialists, with little use of computer simulation. For many, this “new technology”1 based on load-line analysis is simple but extremely practical enough to provide a simple starting point design. Designers first build the starting point and then go to the lab and let skilled technicians and engineers use their expertise to make adjustments at the board level until the required specifications are met. 9 B) d4 x$ O, Y4 ]& C$ \7 }7 @' {% w; O
Others rely solely on load-pull data to define their design criteria and achieve the required trade-offs between output power, efficiency and linearity to meet the power amplifier output matching goals. However, there are limitations, load-pull data at each frequency is very expensive to obtain, and load-pull data at the required frequency may not always be available for a new design. Often, tuning is still required to achieve the desired performance goals. , }6 z) a$ T; l
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The obvious classroom for “old-generation” PA design is the power test bench, which helps “students” understand how to move capacitors and coils around in a test circuit to achieve desired goals. This is a skill worth learning, and many PA gurus claim to truly understand how to use these methods to produce first-class power amplifier products; however, this board-test-debug method is sometimes inefficient. Accurate
nonlinear models2,3 combined with powerful EDA tools such as Keysight Technologies’ Advanced Design System and similar tools have changed the design paradigm for power amplifiers and shortened the time for experimental debugging.
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, more and more PA designers are turning to model-enabled nonlinear simulation design flows, which can achieve more “first-pass” manufacturing and testing, meet design goals, and require little or no tuning. Using model-enabled full PA circuit simulation, nonlinear circuit performance can be optimized for complex combinations of PA goals, either narrowband or wideband. Nonlinear models bring significant advantages to designers who need to complete designs quickly, but may not have load-pull measurement data at the target frequency. This simulation capability is very helpful in guiding post-manufacturing debugging to improve or fine-tune performance if necessary. As a result, many modern designers will not even consider using a new PA transistor when the model is not available. Another trend is that for many designers who want to use "waveform engineering"4 to optimize high-efficiency PA operating modes such as Class B, Class AB, Class F, and Class J, they need access to the inherent voltage and current ports. The Modelithics-Qorvo GaN Model Library was
of PA designers for accurate nonlinear models of GaN devices. This article describes the content, benefits, and new features of this growing model library and shows validation examples to verify the model quality and accuracy at the device and circuit levels. This model library is currently available for the Keysight Advanced Design System (ADS) and NI-AWR design environments. We will use the Keysight ADS EDA software to demonstrate this model library, model capabilities, and validation flow. 1 G% e8 `. ?4 Q6 U GaN Model Library Description * M. T3 U* `+ w9 A2 P6 The current version (1.7) of the library includes models for 17 bare die and 35 packaged devices, with more models in development. The library offers maximum convenience to designers with a simple “point and click” installation process and access to detailed model information datasheets from within the simulator. For example, in Keysight ADS, this is done by simply clicking the “Help” button in the model parameter pop-up window. The GaN Model Library is provided free of charge and supported by Modelithics and sponsored by Qorvo. One of the benefits of this configuration is professionally managed software support, version control, and frequent updates. With each update, new model, and model update provided, all models are kept up to date and work with the latest EDA software versions. ; ~, b/ p, f2 I2 n2 @' B- G4 m The GaN models themselves are currently based on a customized version of the Chalmers Angelov model5. The advanced customization capabilities of these models provide the following benefits to designers: 0 a% \4 e3 s! D" `' Z$ C ? Extended operating voltage (VdsQ) ? Ambient temperature and partial or full on/off self-heating effects ? Access intrinsic voltage/current nodes for waveform optimization ? Switch to on/off bond wires based on applicable die models. # d4 F4 f. D1 V X+ J+ ]4 k8 i- g2 [$ i* a0 aFigure 1 shows the ADS symbol for a typical die model showing the user input parameters for the model. The VdsQ for this particular model is scalable from 12V to 28V, while other models in the library may have values as high as 50V, depending on the normal operating bias conditions of the device. This can be thought of as a “scalable” sweet spot for the model. Unlike typical nonlinear models, which are bias scalable by nature, they are often tuned to perform best at a specific operating voltage. This bias scalability improves accuracy for different bias conditions, for example, the IV pulse data used to build the model is different when using pulse data for different VdsQ values, as shown in the model results in Figure 2a. : W g" N# t$ t6 U; E/ v( _' j
 ▲Figure 1 Schematic diagram of die model (
a) and die with reference layer (b).
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▲Figure 2 Static bias voltage (VdsQ) extension (a) and self-heating effect (b) of the model in Figure 1. The Vgs range is -4V to +1V with a step of 0.5V.
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models also allow the designer to account for ambient and self-heating effects. Figure 2b shows the IV data for the simulation of Figure 1 with the “Self-Heating Parameter” set to 0 (no self-heating) and 1 (full self-heating, for static bias/CW conditions). As with other advanced customizations, the self-heating parameter can be set equal to the duty cycle to approximate partial self-heating effects of a pulsed signal using intermediate values between 0 and 1. The ambient temperature variable can be provided by entering the “Temperature” of the model, which for this model is a good fit for temperature variation data in the range of 25 to 85°C. This range may vary based on information in the Model Information datasheet for each model. , S" `, R+ s2 ?) u. G! IThe
bond wire removal feature is applicable to bare die models developed with firmware with bond wires. This allows the user to easily recreate the same simulation verification shown in the datasheet that accompanies the model information for the bond wires, or remove the bond wire effects and embed the model into their own unique circuit environment. This feature is not available for packaged devices, but for die models that can be directly wafer probed, and other die models that are extended versions of the measured models developed based on the smaller die size. 8 }0 Y% ~& Z" [, w" Q3 D'
lBased on designer feedback, all models in the model library have access to the intrinsic voltage and current nodes for waveform analysis and optimization. Figure 3 shows this concept. The goal is to give designers access to the voltage/current nodes of the model's drain-source current generator layer while removing all parasitic effects. As shown in Figure 3b, parasitic impedances can cause the simulated dynamic load line to swing outside the limits of the IV layer and even into negative currents; this is not the case with properly extracted intrinsic waveforms. Figure 4 shows the waveforms of the simulated intrinsic voltage and current. It can be seen that the class A, class B and class AB currents work as we usually expect, that is, full-waveform class A current, half-waveform class B rectification, etc., but a smaller "conduction angle" 6 waveform is provided for the class AB current.
▲Figure 3 Intrinsic waveform sensing concept (a) and simulated dynamic load line results of packaged transistors on external (blue) and internal (red) nodes (b). |4 g' D1 `- m. Y! w+ w
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▲Figure 4 Intrinsic voltage (a) and current (b) waveforms of the intrinsic reference layer of the TGF2023-2-01 transistor die under class A (red), class AB (blue) and class B (green) bias under power back-off.
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5 V7 c* ^. I7 V& \3 P- t4 i' CDevice
Level Validation8
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model information datasheets mentioned above are key to understanding the details of each model contained in the model library. These details include model functional block diagrams, detailed device-level validation, and in some cases, PA circuit-level validation using reference designs. Datasheets typically contain 15 to 20 pages (or more) of information. Example device validation includes simulation model agreement with application measurements for current-voltage (IV) characteristics, multi-bias S-parameters, load-pull data, and Pout/PAE/Gt power sweep data. Some device models also include configurations for noise parameter data.
Figure 5 contains a snapshot of some of this information in the datasheet, with a recently added GaN bare die device based on a 0.15μm technology process. As summarized in the model functional block diagram (see Figure 5a), this particular Qorvo TGF2935 device model has been tested at 40GHz. S-parameter verification and high power performance at 10 and 18 GHz verified on a large signal load pull platform. * ]/ p2 E1 @' P( f& v
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Figure 5 Model datasheet information for the large-signal version of the TGF2935 bare-die model: functional block diagram (a), IV model and measurement (b), firmware components (c), 10 GHz single-tone power sweep, and power matching (d).
Snapshots of
simulated and measured IV performance at both temperatures are provided (see Figure 5b). The assembly diagram details the reference layer and bond wire details (see Figure 5c). Swept conversion gain (Gt) and efficiency vs. output power plots are used to compare the high power behavior of the validated model with measured data (see Figure 5d). Large- and small-signal models are also available for bare die on a 0.15μm process to accurately predict noise parameters up to 26GHz.
Similar
information is provided for the packaged device model (see Figure 6), which includes information for the 285W Qorvo T1G2028536-FL-001 device selected from the model datasheet. The model functional block diagram (see Figure 6a) shows that it has been validated to 3GHz with S-parameters, temperature scalability, and high power data at 1 and 1.5GHz. Plots of simulated and measured data are also shown for load pull and power up drive. # Z4 N7 U7 c7 r5 o, P' p- h6 t
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▲Figure 6 Load-pull and power-up drive verification for Qorvo T1G2028536-FL-001 device (a), model functional block diagram (b), power sweep verification with power-adjusted load (1GHz) (c), 5Ω Smith chart, load-pull at +35dBm input power (1GHz) (d).
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PA circuit-level verification " V t: L# A6 t" t8 p6 a
In addition to the device-level model verification discussed above, power amplifier circuit-level verification is performed. Four simulation-based PA reference design examples are discussed here, whose models have been used for other model verification in the GaN model library. These PA designs range from medium power to high power and use multiple unique device models in the model library, each of which plays its own value in achieving a first-time successful design. All designs shown require no board debugging or bias adjustment in the first post-assembly test.
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“closing the loop” of initial measurements and simulations for such amplifier examples, attention to detail in modeling the passive matching and bias circuits is as important as nonlinear models that predict the frequency-dependent behavior of these amplifiers. Board-related variations are also important for using accurate parasitic models for all surface mount passive components (when used). These are modeled using the Modelithics CLR Library? models. 7 " [+ y2 F2 R: M+ v9 r" e$ |
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ITable 1 summarizes the goals and results of the first PA design example when validating the Modelithics model for the Qorvo TGF2819-FL discrete packaged GaN product. The assembled PA and simulation-measurement comparison are shown in Figure 7. Using the model, an L-band reference design for a high power, high efficiency PA was “quickly translated” to deliver over 150W of power and over 60% efficiency.
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▲Figure 7 Assembled TGF2819-FLPA (a), simulated and measured output power (b), and power added efficiency (c). Red = simulation; blue = measured average of five device samples mounted on an evaluation board , `# a& B1 [$ m/ V2 k5 QAnother
PA verification circuit, described in Table 2 and detailed in Figure 8, can be used to verify the Qorvo T2G6000528-Q3 GaN product. This is a 10W design with good model-measurement agreement for 5 to 6 GHz operating frequency. This design has 55% efficiency and 13dB gain. In addition, this example shows the added value of Modelithics large-signal models for "production design" by predicting typical device performance at Qorvo. The five devices used for each amplifier have a two-year data code gap, which indicates that they have good production consistency. Simulations are able to predict the average performance of multiple amplifiers using large-signal models.
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▲ Figure 8 10W, 5 to 6 GHz PA reference design (a), simulated and measured output power at 5.4GHz (b), and power added efficiency vs. frequency (c). Solid lines = simulation, dashed lines = measurements for five PAs.
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Table 3 and Figure 9 outline a third example, a 2 to 2.7 GHz design built by Qorvo that can generate 10W of power, 50% efficiency, and 20dB of gain using the same devices in the second PA example. Table 4 and Figure 10 show details of a fourth PA verification circuit example using a Qorvo T2G6003028-FS package product model. This is a narrowband design at 5.8GHz and 30W of output power, achieving 50% power added efficiency and 14dB of gain. There is good agreement between simulation and measurement except that the center frequency is slightly offset from the design target. A recent application note discusses the circuit-level modeling flow for this circuit using Keysight ADS in detail8.
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▲ Figure 9 10W, 2 to 2.7 GHz PA (a), simulated and measured performance at 3dB compression (b). Solid line = simulation, symbols = measurement. " [5 i) u3 A" G2 I+ U% n2 t+ g
 
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▲Figure 10 30W, 5.8GHz PA (a) 8, simulated and measured gain and output power (b) and power added efficiency (c). Solid line = simulation, symbols = measurement.
In all four designs, the first-pass design was achieved due to the high accuracy of the models used and ADS simulation and optimization of circuits and component values before manufacturing.
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, g4 i7 U6 q2 r2 w! e# B ?1 kConclusion
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The effective collaboration between Qorvo and Modelithics has led to the development of an extensive library of GaN models for both discrete die and packaged transistors. Each model is discussed in detail and has been extensively validated at the device level as described in the model information datasheet. A range of power amplifier reference designs have been used to validate the usefulness and accuracy of the models for real-world PA designs. This work demonstrates that a new paradigm for PA design is beginning to be fully applied to device models and used to build all passive network modeling, with the goal of replacing “old generation” platform debugging with simulation and optimization to achieve a first-pass “simulate-build-test-done” PA design flow. C+ _6 |. j4 F* b- v9 RAcknowledgements
The
authors would like to thank the Modelithics engineering team for their hard work in developing and maintaining the Modelithics-Qorvo GaN model library and the associated validation discussed in this article. Thanks also to Richard Martin and Neil Craig, they actively coordinated and cooperated to finally complete the above model library which belongs to Modelithics supplier partner program. . i/ n5 m, ^: p4 a, y# U: Y
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source: http://www.mwjournalchina.com/Detarticle.asp?id=3935 , for more exciting content, please visit the website. 8
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