Analyzing the basic steps of FPGA power supply design

led2015

Analyzing the basic steps of FPGA power supply design [Copy link]

Field Programmable Gate Arrays (FPGAs) are found at the heart of numerous prototypes and low- to medium-volume products. The main advantages of FPGAs are flexibility during development, simple upgrade paths, faster time to market, and relatively low cost. A major disadvantage is the complexity, with FPGAs often combined with advanced systems-on-chip (SoCs).
　　This complexity places demanding demands on the power supply. To meet these challenges, the power supply requires several outputs and a combination of switching regulators for efficiency and linear regulators for clean power.

　　Computing System Power
　　Supplies Powering an FPGA looks like powering a complete system. Power supply designers face the challenge of supplying 3 to 15 voltage rails (sometimes more); and that's just the beginning. FPGAs are typically manufactured using the latest wafer fabrication technologies that require low core voltages, but the power supply must also power multiple rails for specialty blocks and circuits, provide multiple voltage levels, supply additional current for high-power modules, and meet the requirements of noise-sensitive components. Just
　　to make things more complicated, even FPGAs from the same manufacturer can vary widely, making it important that engineers select the best power supply for each chip. Such a selection depends on a variety of factors, such as the voltage and power requirements for each rail, the rails' sequencing requirements, and the system's power management needs.
　　The first step in designing an FPGA power supply is to determine the individual voltage rails and their requirements. FPGA vendors typically provide a "pin sheet" that specifies the voltage level at which each supply pin is connected to the device's voltage rail.
　　FPGA rails operate at several different voltages depending on the block being powered. Requirements typically include the core (powering the internal logic array), I/O (driving the I/O buffers which can be grouped in banks, each operating from a different voltage), phase-locked loops (PLLs) (powering the PLLs in the core), and transceivers (supplying the digital and analog circuitry in transceivers, receivers, and transmitters).
　　Once the individual voltage rails have been determined, the next step is to calculate the current draw on each rail in turn. The current draw of the shared rail should be added to the rail in the analysis to total that rail. FPGA vendors typically provide online calculators for this purpose. Next, the engineer should add up the power draw of all of the components that make up the FPGA in order to accurately estimate the power consumption of the entire chip. After
　　calculating the power draw, the next step is to check the specifications for voltage variation tolerance and maximum voltage ripple for each rail. These parameters can usually be found in the FPGA's datasheet.
　　The load regulation specification determines the range (in mV) within which the output of a voltage regulator may deviate with changes in load. A typical specification for load regulation is ±5 mV if the power supply is derived from a switching DC-DC voltage converter ("switching regulator"). This is only a 0.4% deviation if the specified voltage rail is 1.2 V.
　　Voltage ripple is measured from peak to peak in mV, and its magnitude depends on the design of the voltage regulator supplying the particular rail under analysis. Output filtering heavily affects voltage-(current) ripple performance. (See the TechZone article "Capacitor Selection is Key to Good Voltage Regulator Design.") Most FPGAs tolerate voltage ripple of up to 2% or rail voltage, which is well within the capabilities of modern switching regulators.

　　Switching or Linear Regulators?
　　The next step in the FPGA power supply design process is to determine whether a particular rail should be powered by a switching regulator or a linear regulator. Special attention is required for analog power rails that supply noise-sensitive circuits such as PLLs and transceiver circuits. Excessive noise on these rails can compromise circuit performance.
　　Linear regulators provide ripple-free power, have fast response, are simpler to use, and take up less space than switching devices. They are a good choice for noise-sensitive PLL and transceiver rails. The main disadvantage is a lack of efficiency, especially when the output voltage is a lot lower than the input.
　　Switching regulators are a better choice for high-power rails, where their higher efficiency is more important than noise. They are a good choice for powering digital core logic and I/O operations in FPGAs, where current requirements can easily run into tens of amps. The disadvantages of a switching regulator are that it is more complex, larger, and requires more external components. (See the TechZone article "Understanding the Advantages and Disadvantages of Linear Regulators.")
　　The resulting power supply can be a bit complex, including several switching regulators and linear regulators in a "power tree" (Figure).

FPGA Power Modules The
　　power supply for an FPGA typically includes a combination of switching and linear regulators working together to provide different voltages and stable power with reasonable efficiency. Designing such a supply is not trivial, but things can be made much simpler by integrating several switching and linear regulators into one chip around the basic power module circuit.
　　Maxim's MAX8660 power module, for example, includes four switching regulators (running at 2 MHz, thus encouraging the use of small inductors) and four linear regulators. The switching regulators automatically switch from pulse-width modulation (PWM) to light-load operation to reduce operating current and extend battery life.
　　The device provides output voltage ranges of 0.725-3.3 V (0.4-1.6 A) for the switching regulators and 1.7-3.3 V (30-500 mA) for the low-dropout (LDO) linear regulators, all operating from a 2.6 to 6 V input.
　　The chip also contains power management functions and features such as on/off control outputs, low-battery detection, reset output, and a 2-wire I2C serial interface.
　　Intersil offers the ISL9440 for smaller FPGA applications. The chip combines three switching regulators with an LDO linear regulator. Each output is adjustable down to 0.8 V and the device operates from a 4.5-24 V supply.
　　The ISL9440 provides internal soft-start and independent enable inputs for easy power rail sequencing in a compact 5 × 5 mm QFN package. The chip uses internal loop compensation to minimize external components for compact design and low total-solution cost.
　Texas Instruments (TI) also offers power modules that combine the efficiency of a switching regulator with the noise-free power of a linear regulator. For example, the LM26480 (Figure) integrates two 1.5 A step-down (“buck”) switching regulators and two 300 mA linear regulators. The device operates from a 2.8 to 5.5 V supply and the first switching regulator supplies 0.8-2 V while the second provides 1.0-3.3 V at 1.5 A. The 2 MHz switching regulators operate at up to 96% efficiency. The linear regulators provide 1-3.5 V at up to 300 mA.