TI - MCU - MSP430 User Guide 8 -> WDT Watchdog Module

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TI - MCU - MSP430 User Guide 8 -> WDT Watchdog Module [Copy link]

This content is originally created by EEWORLD forum user Qi IC Kan MCU . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source

The watchdog WDT circuit is not often used in normal debugging, but in real product applications, it can be said that every system will use a watchdog. Its main functions and effects are as follows:

The basic function of the watchdog circuit is to restart the system after a software problem or program runaway. The watchdog counter counts automatically when it is working normally, and the program flow resets it regularly. If the system is stuck or runaway somewhere, the timer will overflow and enter an interrupt. Perform some reset operations in the timer interrupt.

To restore the system to normal working state, that is, when the program is not running normally, reset the watchdog as scheduled to ensure that the selected timer overflow is reset to zero and the processor is restarted. The timing time of the watchdog circuit can be determined by the cycle of the specific application program, which is usually slightly longer than the maximum cycle time when the system is working normally.

The MSP430 MCU has a watchdog module directly integrated inside. It can monitor whether the program is dead through user settings. At the same time, it can be configured into two modes through registers, making it more convenient for customers to use. The internal structure of the watchdog circuit is shown in the figure below:

As can be seen from the structure diagram above, the MSP430 MCU provides a PUC signal inside to clear the watchdog counter, which is the feeding operation described by the external watchdog. When the program runs dead, this signal is not generated. Therefore, when the watchdog timer is set to expire, a reset signal is generated to restart the system. At the same time, the clock source of the watchdog counter can be selected by the user.

The MSP430 watchdog is relatively simple and can be configured into two modes: watchdog mode and interval mode. The description and difference of these two modes are as follows:

• Watchdog mode: Same as the hardware watchdog function. After setting the watchdog count time, if the program runs dead, the watchdog interrupt will be triggered after the set time, and the software will be reset. The program pointer PC will point to the reset vector, and the program will be reset by software. Note: The watchdog reset sequence is: program runs dead- > trigger watchdog interrupt- > execute interrupt service program (save data and other operations, which is determined by the user) -> reset program.
• Interval time mode: This is similar to the timer, but the time is not very precise. After the watchdog counter reaches the set time, the watchdog interrupt will be triggered, but the software will not be restarted. At the same time, there is no dog feeding operation in the interval time mode. Similar to the timer, the watchdog interrupt will be triggered every set time period, so it can be used as a timer.

The following is an explanation of the watchdog register. This is relatively simple. The watchdog has only one register, as shown in the following figure:
WDTCLY register:

• WDTPW : First look at the upper eight bits of this register, which is the password of WDT . When operating this register, you must enter the password ( 5Ah ) at the same time, otherwise writing any number will cause the watchdog reset program. (Note that it is written at the same time, not writing the password first and then operating the register) At the same time, the reading result of this upper eight-bit password register is always 69h .
• WDTHOLD : Enable of watchdog timer, 0 stops this timer, 1 enables this timer.
• WDTSSEL : Watchdog timer clock source selection, the default is SMCLK , X_CLK clock only exists in some MSP430 MCUs .
• WDTTMSEL : Mode selection, 0 selects watchdog mode, 1 selects interval time mode.
• WDTCNTCL : Watchdog timer clear bit. Writing 1 will clear the current value of the watchdog timer. The timer will be automatically cleared after the timing time is reached.
• WDTIS : Timing time setting. There are eight timing times to choose from. The first one is to set the set value of the timer. The watchdog counter is a 32 -bit register with a maximum value of 2 ^32. However, since the watchdog does not require precise time, it is set to 8 segments. It is enough to provide eight times. The calculation time is shown in the figure above. This is related to the clock source. If the clock source frequency is 32768Hz , WDTIS = 100b , then the set count value is 2 ¹⁵ =32768 , so the timing time is 1 second.

At the same time, if you are careful, you will find that if the watchdog function is used normally, there are still two missing registers: interrupt enable register and interrupt flag register. These two parameters WDTIE and WDEIFG are in SFRIE1.0 and SFRIFG1.0 registers respectively , as shown in the following figure:

• WDTIE (only 1 bit )

WDTIE is at bit 0 of the SFRIE1 register , and the default is 0 , which means the watchdog interrupt is disabled. Note: Even if the watchdog interrupt is disabled, if the watchdog timer is set in watchdog mode, the program will still be reset after the program runs away, but no interrupt will be generated. Therefore, if the watchdog timer is not used, please disable the timer and use the following program:

WDTCTL = WDTPW + WDTHOLD; // Stop WDT

• WDTIFG (only 1 bit )

WDTIFG is on bit 0 of the SFRIFG1 register . The default is 0 , which means there is no interrupt signal. It can be cleared manually. Of course, the watchdog timer will automatically clear this flag after entering an interrupt.

Well, after explaining the principles and registers, the watchdog program is still given:

Code 1: Interval time mode, toggle LED :

//******************************************************************************
#include <msp430.h>

int main(void)
{
 WDTCTL = WDT_MDLY_32; // WDT 32ms, SMCLK, interval timer
 P1OUT &= ~BIT0;// Clear P1.0 output latch for a defined power-on state
 P1DIR |= BIT0; // Set P1.0 to output direction
 PM5CTL0 &= ~LOCKLPM5;// Disable the GPIO power-on default high-impedance mode
 // to activate previously configured port settings
 SFRIE1 |= WDTIE; // Enable WDT interrupt
 __bis_SR_register(LPM0_bits | GIE); // Enter LPM0, enable interrupts
 __no_operation(); // For debug
}

// Watchdog Timer interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=WDT_VECTOR
__interrupt void WDT_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(WDT_VECTOR))) WDT_ISR (void)
#else
#error Compiler not supported!
#endif
{
 P1OUT ^= BIT0; // Toggle P1.0 (LED)
}

Code 2: Watchdog mode, 1 second (the watchdog time needs to be set by the user according to his/her own program during use):

//******************************************************************************
#include <msp430.h>

int main(void)
{
 // Selects the ACLK source to REFO (internal 32kHz clock source) as default
 WDTCTL = WDT_ARST_1000; // Set Watchdog Timer timeout 1s
 P1DIR |= BIT0; // Set P1.0 to output direction
 // Disable the GPIO power-on default high-impedance mode
 // to activate previously configured port settings
 PM5CTL0 &= ~LOCKLPM5;
 P1OUT ^= BIT0; // Toggle P1.0
 __bis_SR_register(LPM3_bits | GIE); // Enter LPM3
 return 0;
}

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