General Design Considerations for Embedded Systems

Aguilera

General Design Considerations for Embedded Systems [Copy link]

Our lives are filled with an ever-increasing number of tiny battery-powered devices and systems. These embedded systems must be powered by the same power supply for a long time to reduce recurring maintenance costs or avoid frequent power supply replacement by the end user. Early planning can reduce the need for rework and/or code rewriting while optimizing the system for low power consumption. These considerations include:
　　1. Designing for low power at the application level;
　　2. Understanding the trade-offs between power consumption and performance;
　　3. Using hardware and software techniques to optimize power consumption.
　　Power Consumption Factors in Embedded Applications
　　The power consumption in any given system can be divided into two categories:
　　i. Static power consumption: Static power consumption refers to the power consumed by the device when it is not running code and waiting for a specific event to trigger the system to wake up to the working mode. Static power consumption mainly includes leakage current flowing through the system, analog deviations, modules that cannot be turned off, and modules running independent code such as RTC, watchdog timer and interrupt controller. This current is proportional to the operating voltage of the device. The higher the operating voltage, the greater the leakage current;
　　ii. Dynamic power consumption: The power consumed by the CPU when the system is in the working state and the program code is executed is called dynamic power consumption. The dynamic current of the system depends on the operating frequency, voltage, and parasitic capacitance of the bus and circuit design. The calculation method is:
　　P = V2 * f * C
　　V is the voltage, f is the operating frequency, and C is the parasitic capacitance of the output end
　　Graphical expression of static and dynamic power consumption:

　　For any given transistor, its static power consumption is essentially constant at a given supply voltage. Static power consumption originates from leakage current (CMOS circuits) or bias current (operating analog circuits), depending on the type of system.
　　Dynamic power consumption in transistors occurs during voltage transitions. During these transitions, the CMOS pair enters a state where both devices of the pair are partially turned on, acting as resistors, thus forming a voltage divider circuit. This virtual voltage divider circuit consumes much more power than the leakage current at the defined logic level. This is why dynamic power consumption is proportional to the switching frequency in the circuit. It is therefore one of the most fundamental considerations when defining a low-power embedded system, namely to minimize the switching events in the system.
　　1. Hardware Considerations:
　　a. Battery Type:
　　There are mainly the following types of batteries in embedded applications:
　　i. ) Standard Alkaline Batteries
　　iii. ) Rechargeable Batteries: Rechargeable Alkaline Batteries, Li-Ion Batteries
　　iii. ) Button Cells
　　For a wide range of low-power embedded applications, charging the system is not a reasonable use case model. There is no need to use rechargeable batteries for these applications. Let's compare two other batteries that are useful in low-power applications and the factors to consider when choosing a battery for your design.
　　Standard Alkaline Battery: The typical capacity of a standard AA battery is about 1500mAh, which can easily provide hundreds of mA of peak current and can also be discharged at a constant rate of 50mA.
　　Alkaline batteries can provide high peak currents to the application, so the system can run at its highest clock frequency while using all of its dedicated peripherals (timers, communication modules, etc.) in parallel, so that it can quickly enter a low-power operating mode after completing each task as quickly as possible.
　　Button Cell Battery: Button cells have very high internal resistance and cannot withstand high peak currents. When a peak current of more than 20mA is applied, its effective voltage drops significantly, even for a short period of time. Therefore, for designs powered by coin cells, it is strongly recommended to design with components that can operate at 2V or less. The microcontroller's brownout voltage should be low enough to avoid accidental system resets when the coin cell battery provides high peak currents.
　　In addition, we need to take precautions to reduce the peak current required by the system. Ways to reduce peak current include:
　　● Reducing CPU clock frequency
　　● Avoiding enabling all internal blocks at once by distributing the load at all times
　　● Reducing power to external components and internal blocks when they are not in use
　　b. Setting the right microcontroller:
　　To keep static and dynamic power consumption to a minimum in low-power applications, it is most important to select a microcontroller with the required set of peripherals that can operate in the required power mode. Based on the needs, system designers can select a suitable microcontroller that supports the set of peripherals required for their application in low-power mode. Take an
　　application that requires an LCD to operate for a longer period of time. By selecting a microcontroller that can operate the LCD in low-power mode, developers can minimize power consumption. A typical example of such a microcontroller is Cypress's PSoC 4, which allows LCD displays to enter deep sleep mode with a current consumption of only 3uA. The situation is similar for complex applications, where we need to make trade-offs and determine the appropriate microcontroller that can complete each task with the lowest average power consumption.
　　c. Selecting the right passive components:
　　Pull-up resistors and pull-down resistors are common components that support interface switches and I2C devices, etc. Sometimes in low-power designs, these pull-up and pull-down resistors consume more power than the rest of the system. To reduce their power consumption, a larger resistor value is used. This reduces the amount of current that flows through them. However, it also increases the RC time constant, which reduces the system's ability to respond to high-frequency signals.
　　For example, using high-value pull-up resistors for I2C lines will slow down I2C communication because the slew rate of the I2C lines is increased. Therefore, these resistor values can determine the trade-offs between various factors that affect the final design.
　　Similarly, when choosing capacitors for the design, electrolytic capacitors should be avoided because they have very high leakage current. Film capacitors and ceramic capacitors offer very low leakage current at a reasonable cost and can be considered for low-power system designs.
　　d. Use I/O judiciously:
　　Avoid randomly assigning controller I/O pins in the system. If the pins are randomly distributed across different ports, each port needs to be handled individually, which increases the number of register writes required to control them. To address this issue, input and output pins can be grouped by the minimum number of ports so that they can be read and written with the minimum number of register writes.
　　The open-drain drive mode of the pin should be used where the pin is used to drive LEDs and other similar loads, with one end of these loads fixed to VDD or ground. This drive mode reduces leakage current through the I/O pin, thereby reducing power consumption.

　　e. Choose the right peripherals:
　　Use peripheral components that support low power modes and low power consumption in active mode in system design to reduce the overall power consumption of the design.
　　f. Use system clock judiciously:
　　Define the behavior of system clock to help reduce system power consumption. Following common system clock related design practices can help achieve low power consumption in almost every system.
　　● Use low frequency clock in the system to reduce dynamic power consumption.
　　● Boost the system clock when performing computationally intensive tasks to reduce average power consumption by reducing the time to complete the task.
　　● Use system clock in preference to external clock.
　　● When the CPU is waiting for communication transmission to complete, the CPU should be turned off and only the clock to the communication module should be turned on. After completing the task, it can get an interrupt signal to resume code execution.
　　g. Current gating:
　　Normally, passive sensors such as thermistors work in voltage divider mode and therefore consume system current all the time. To reduce power consumption in this case, we can provide power to the sensor network before obtaining relevant data by sampling it and cut off the power after the data sampling is completed. This is useful in cases where the sensor needs to be read periodically.
　　But when the sensor must remain active to detect anomalies in the environment, the CPU can remain in low power mode during the entire sensing process. Once the CPU receives the interrupt/data information from the sensor, it will resume the working mode. Similar logic can be used to read the state of the switch to determine whether it is in the on or off state.
　　2. Firmware considerations:
　　a. Reduce function calls:
　　Each function call will involve multiple redundant operations, such as adding and popping operations on the stack (counters and registers used to reload the program). Each work of these operations consumes multiple clock cycles and should be avoided as much as possible. For short functions, function calls can be replaced with macros that can place inline code. This helps reduce CPU load and thus reduce the power required for the same operation. However, each method has its own advantages and disadvantages. Macros require larger memory, which is a problem for writing high-density firmware because it may increase system cost.
　　b. Use lookup tables for frequently repeated input values:
　　There are usually some input values that are used more frequently than others. By creating a lookup table corresponding to these input values, the calculation time can be shortened when one of these inputs is encountered, thereby reducing power consumption.
　　This method is easy to see in applications where the value needs to be looked up after the calculation is completed, such as the calculation of the sine and cosine of the angle in motor applications. In such applications, there are a series of values that are frequently encountered (compared to other values that are encountered less frequently). The calculation of the sine or cosine value takes a long time, so for this frequently repeated angle, the pre-calculated values of the sine and cosine can be stored in a lookup table. Each time one of these angles is encountered, the processor can look up the table and substitute the value found there instead of having to calculate it.
　　c. Use interrupts instead of polling:
　　In complex embedded systems, the CPU spends most of its time waiting for some work to complete before moving on to the next step. Most SoCs available today provide hardware modules that can complete most tasks without CPU intervention. When CPU intervention is required, they send a signal in the form of an interrupt to wake up the CPU. For example, an ADC will generally send an interrupt signal after sampling data. This eliminates the need to poll for data from the ADC. Therefore, the CPU can enter a low-power mode and wake up only when data is ready for processing.
　　d. Adaptive clock gating and power gating
　　A typical system uses multiple modules of a microcontroller, but not all of them are used at the same time at any given point in time. Therefore, the clocks to these modules can be gated to reduce the dynamic power consumption of these modules, thereby saving power. This also helps reduce peak current requirements, an important consideration for coin cell battery powered designs. The PSoC family of devices allows unused blocks to be disabled individually.
　　In this section we discussed common design considerations for creating low power embedded systems. In Part 2 we will not only discuss examples of low power applications, the trade-offs between low power and system performance, but also provide examples of low power system designs using the above techniques.