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tms320dm642 [Copy link]

Tms320dm642 is the latest DSP of TI's C6000 series DSP. Its core is the C6416 high-performance digital signal processor, which has extremely strong processing performance, high flexibility and programmability. At the same time, it integrates very complete audio, video and network communication equipment and interfaces. It is particularly suitable for high-speed DSP application fields such as machine vision, medical imaging, network video monitoring, digital broadcasting and consumer electronics products based on digital video/image processing. In response to the needs of market customers, the author designed and implemented a multi-channel video acquisition and compression processing PCI board with TVP5150 as video input decoder, PCM1801 as audio input acquisition circuit, and TMS320DM642 DSP as core processor, and applied it to build a high-stability, high-robustness and multimedia digital monitoring system, which has achieved good social and economic benefits.
Hardware Architecture of TMS320DM642TMS320DM642
  adopts the second generation high performance, advanced VLI veloci T1.2 structure DSP core and enhanced parallel mechanism. At the clock frequency of 720M Hz, its processing performance is 5760MI/s, making this DSP the first choice for digital media solutions. It not only has the operational flexibility of high-speed controllers, but also has the digital processing capabilities of array processors. The peripherals of TMS320DM642 integrate very complete audio, video and network communication interfaces,
mainly consisting of
  3 configurable video ports (VPORT0-2) that can achieve seamless connection with general video encoders and decoders, support multiple video resolutions and video standards, support RAW video input/output, and transport stream mode;
  1 10/100Mb/s Ethernet interface (EMAC), compliant with IEEE 802.3 standards;
  1 multi-channel buffered audio serial port (McASP), supporting I2S, DIT, S/PDIF, IEC60958-1, AES-3, CP-430 and other audio formats;
  2 multi-channel buffered serial ports (McBSP), driven by RS232 level;
  1 VCXO interpolation control unit (VIC), supporting audio/video synchronization;
  1 32-bit, 66MHz, 3.3V master/slave PCI interface, compliant with PCI2.2 specification;
  1 user-configurable 16/32 host interface (HPI);
  1 16-bit general-purpose input/output port (GPIO);
  1 64-bit external memory interface (EMIF), capable of seamlessly connecting to most asynchronous memories (SRAM, EPROM) and synchronous memories (SDRAM, SBSRAM, ZBT SRAM, FIFO), with a maximum addressable external memory space of 1024MB;
  1 enhanced direct memory access controller (EDMA) with 64 independent channels;
  1 data management input/output module (MDIO);
  1 I2C bus module;
  3 32-bit general-purpose timers;
  1 JTAG interface and daughter board interface compliant with IEEE 1149.1 standard, etc.

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