HiSilicon starts! What is the difficulty in making driver ICs independent?

Many domestic manufacturers, represented by HiSilicon, are rushing towards the huge driver IC market.

Jiwei.com has confirmed with industry insiders that HiSilicon's OLED driver IC (Display Driver IC, DDI) will be mass-produced in the first half of 2022, with a production capacity of about 200,000 to 300,000 pieces per month. In addition to HiSilicon, many domestic manufacturers including Chipone, Eswin, Yunyinggu, and Zhongying Electronics have also achieved breakthroughs in their respective fields in recent years.

It is generally believed in the industry that DDI generally adopts mature 65nm and 40nm process technology, and the highest process technology is only 28nm. Considering the current domestic foundry level, it is not difficult to solve. So, what made domestic semiconductors once lose this huge potential market to others? In addition to foundry, are there any hidden difficulties in DDI autonomy?

Jiwei.com learned from many people in the industry chain that, from a technical point of view, outsourcing is probably not the biggest obstacle to DDI independence. The back-end DDI packaging and testing and key testing equipment are the two most difficult hurdles to overcome.

The first hurdle: "There is gold hidden in every driver chip"

The DDI packaging and testing process includes wafer bumping, wafer testing, wafer thinning and dicing, packaging, testing, and finally delivering the finished product COF/COG (combining DDI with the display panel) to the customer's designated location. Among them, bumping and COF/COG are the biggest differences between DDI and other IC packaging and testing.

A senior executive of a leading domestic packaging and testing factory told Jiwei.com that there are many manufacturers in mainland China that are proficient in COF/COG technology, but for DDI packaging and testing, the biggest difficulty lies in the bump processing technology.

Wafer bumps are referred to as bumps. After the wafer is made into circuits through a special semiconductor process in the front-end wafer factory, it is sent to the packaging and testing factory for further processing. Bumps are made on the chip's pads using thin films, yellow light, electroplating and etching. This process can greatly reduce the size of the IC.

In addition, bumps are also the solder balls needed for flip-chip DDI. Flip-chip is another packaging technology besides Wirebond technology. Its characteristic is that it can fill the back of the chip with pins, so it is mostly used for the packaging of multi-pin chips such as CPU and DDI.

According to different materials, bump processing is divided into gold bump and copper-nickel-gold bump, among which gold bump has the advantages of high density, low induction, low cost, good heat dissipation, etc. It can be directly embedded in the display screen to save space, so it is mostly used in DDI. Although the copper-nickel-gold bump process is more complicated than gold bump, it is cheaper and harder because copper and nickel replace part of gold.

As chip manufacturing processes become smaller and smaller, transistor density becomes higher and higher, and technical difficulty continues to increase, the application of gold bumps in high-end DDI packaging and testing is becoming increasingly difficult to replace, which also means a further increase in packaging and testing costs.

As one of the few manufacturers in mainland China that provides gold bump processing services, Xinhuicheng, which has just started the listing process on the Science and Technology Innovation Board, said in an interview as early as 2018 that gold processing is used in every driver chip. "So, it is true that there is gold in your mobile phone."

It is said in the industry that one gram of gold is used to produce an 8-inch wafer. Xinhuicheng also said at the time, "According to the current planned output value, after all wafer bumping and packaging and testing projects are put into production, Xinhuicheng will use 80 tons of gold a year."

At the same time, as chip manufacturing processes become smaller and smaller, transistor density becomes higher and higher, and technical difficulty continues to increase, the technical threshold and capital cost of bump processing technology are getting higher and higher. In addition, DDI previously had low product profit margins and was less involved in domestic design factories, which put it at a disadvantage in the allocation of foundry capacity. This led to weak demand on the packaging and testing end, making packaging and testing factories even more unwilling to pay high costs to do DDI packaging and testing.

Currently, the global DDI packaging and testing is mainly dominated by Taiwanese manufacturers represented by Chipbond and Chip Micro, as well as Korean packaging and testing companies with developed display panel industries. In mainland China, although many manufacturers have recently increased their investment in related fields, it is still weak compared to the vast demand.

It is also worth mentioning that SMIC Jiangsu Changdian Technology Co., Ltd., jointly established by SMIC and Jiangsu Changdian Technology Co., Ltd., announced in 2017 with Qualcomm that the processing technology certification of its 10nm silicon wafer ultra-high density bumps had been launched. In April this year, SMIC announced the sale of its equity in SMIC Jiangsu Changdian Technology Co., Ltd. Some analysts believe that this move is expected to enable SMIC Jiangsu Changdian Technology Co., Ltd. to be removed from the Entity List through coordination with the US.

The second hurdle: The only "price is firm, no discount" for the equipment

If the high cost of bump processing makes the packaging and testing factories hesitate in the DDI field, then the testing equipment is the real bottleneck of DDI independence in mainland China. According to Jiwei.com, in terms of DDI testing equipment, the global leader Advantest can be said to have achieved an oligopoly.

A senior executive of a leading domestic testing equipment company told Jiwei.com that the DDI industry is currently mainly using Advantest's ND4 (for wafer testing) and ND3 (for finished product testing), which account for more than 95% of the market. The second largest market is WINTEST (acquired by Precision Electronics), but it accounts for a small proportion and can only be used for finished product testing for the time being, and some indicators cannot meet wafer testing standards.

According to another senior industry insider, COHU's DX can also test some small DDI chips, but its functions and performance are far inferior to the ND series. In general, DDI chip testing is basically only done by Advantest, and "the price is firm, without any discounts."

What makes DDI test equipment so monopolized? From a technical perspective, according to the analysis of the two people mentioned above, the high parallel test count and the requirement of DDI built-in Memroy test are the main difficulties in the development of DDI test equipment. In addition, for DDI testing, Advantest has a unique set of dedicated test instructions, which also raises the entry threshold.

"DDI test equipment is different from general ATE (automatic test equipment), and requires high-voltage pins (several thousand)," said a senior person. "It's not that the technology is difficult, but the cost of making such equipment is not low, and the R&D cost is also high. But who will we sell it to after it is made?" "The market space is not large, and the major fabless companies are already Advantest's customers."

The senior executives of the above-mentioned leading packaging and testing equipment companies also said that the bottleneck of DDI equipment is mainly on the client side, which requires the cooperation of design companies. Currently, the main company in mainland China that is truly engaged in DDI and mass production is Zhongying Electronics, and HiSilicon has also entered the market, but it is not clear to what extent the mass production has been achieved. The giants are all in South Korea and Taiwan.

In terms of packaging and testing equipment, Advantest has basically monopolized the entire market. If new local equipment wants to enter this market, it must first obtain the approval of design companies. For Sinowin and HiSilicon, their DDI products are still in the stage of increasing volume, and they will not take the risk of giving priority to domestic equipment.

The senior executive admitted that domestic design companies are still looking forward to domestic solutions, but there are too few people who understand DDI testing, and the problem can still be solved technically. "In the future, as domestic design companies increase in volume, there will be a demand for cost reduction, and the market for this equipment should take off, but it is not yet the right window period."

Jiwei.com checked the data and found that among the semiconductor test equipment manufacturers currently listed on the A-share market, Jingce Electronics and Huaxing Yuanchuang have made some layouts in related fields. The former's subsidiary WINTEST and its wholly-owned subsidiary in Wuhan, Weien Test, are currently focusing on the field of DDI test equipment and have obtained batch orders. Some performance indicators of the latter's test machine can already match those of international leading manufacturers, with strong market competitiveness. At the same time, the client verification is smooth and the orders are full.

DDI packaging and testing equipment becomes the biggest shackle as prices continue to rise

At present, it is not only the DDI manufacturers in mainland China that are in a passive position due to packaging and testing. With the surge in OLED installations driving the demand for OLED DDI, and DDI becoming the hardest hit area of ​​semiconductor shortages, the global DDI packaging and testing capacity has long been in a critical situation, and the price increase trend has continued.

In October last year, Chipbond and Chipmao successfully raised their packaging and testing prices by about 5-10% due to the shortage of production capacity. In 2021, the tight packaging and testing capacity situation has not eased. In the second quarter, the cost continued to be reflected and passed on to customers, with an increase of about 15-20% depending on the product. According to Chipmao, its packaging prices have increased by 5-8% in the first half of the year. As the testing capacity continues to be tight, the hourly testing price has also increased by 5-10%.