In early September 2020, the self-developed chip SER (Soft Error Rate) verification system of Jifeng Electronics (NEEQ: 870641) successfully completed the first batch of tests for customers. The engineering and technical personnel of a domestic advanced process wafer factory customer confirmed the results on site and had no doubts about the results. They acknowledged that the platform was stable and reliable and the results were valid. This move marks that the self-developed innovation of mainland Chinese enterprises has made a key breakthrough in the SER field. It can provide Chinese wafer and chip companies with a high-efficiency, more stable and reliable, and more reasonable cost SER solution, becoming the first domestic method successfully developed to meet industrial verification standards. Jifeng Electronics has taken another solid step towards building China's No. 1 chip engineering technology center! Make operational engineering easier! Make IC Operations Easier! Jifeng Electronics is practicing its own value!
What is soft fail
The startup and workflow of the general CPU system are as follows:
Figure 1: Soft failure diagram
When the system is running, an unexpected error occurs in some memory data, the entire software crashes or the data is abnormal, but after restarting, the memory data is reloaded by the first step and the system returns to normal. This is a soft error.
How a memory cell flips abnormally
Figure 2: Soft failure reasons
Figure 3: Causes of abnormal flipping
Jifeng SER platform and testing solution
The Jifeng Electronics SER platform is a complete test suite that includes hardware, software, and corresponding long and short distance connection lines. Therefore, customers only need to provide the chip to be tested, signal timing diagram, and configuration registers. The test platform can also provide a pure adjustable voltage source for the chip to be tested.
Figure 4: Test area and connection diagram
Jifeng SER verification system has the following features:
1. Support remote software control, result display, and high-intensity nuclear radiation human safety long-distance communication mode.
2. Support multi-chip parallel testing, parallel control and reading results.
3. Support real-time display of all data test results and data statistics functions.
4. Supports returning all error bits and error addresses of the chip and saving them as binary files.
5. Support multiple customer-defined test data type cases, including 0x00, 0xFF, 0x55, 0xAA…
6. Support various user operations, including start, stop, initialize, reset...
7.Support high voltage upper limit and low voltage lower limit testing.
8.Support timing adjustment, adjust the test frequency according to customer chip requirements and distance.
9. Supports multiple irradiation intensities to provide customers with richer data.
10. Support data analysis and generate reports for internal and external use by customers.
Figure 5: Jifeng SER verification system test platform software interface (customer actual data is hidden)
Figure 6: Jifeng SER test hardware platform main control picture, LCD also displays the test results
Before this, domestic companies had little knowledge of this kind of chip and wafer process-level experiment. Occasionally, there are high-quality customers who want to do it, but they often don’t know where to do it. In contrast, the SER verification system successfully verified by Jifeng Electronics this time allows customers to complete the experiment in China, which has huge advantages in terms of cycle and cost compared with foreign solutions.
The customer chose Jifeng to implement the SER solution because the customer believed that Jifeng Electronics has made rapid progress in the past two years and has unique integrated technology advantages in local high-end talents and cross-border innovation. All Jifeng talents are 100% experienced and independent talents from top design companies and laboratories in mainland China. They came together with different experiences and expertise and defined all the software and hardware solutions and experimental implementation plans in less than a week. The customer confirmed that it was feasible and recognized Jifeng as the only supplier that could provide complete equipment system software and hardware development and experiments. In the following two months, Jifeng debugged and completed the research and development of all software, hardware and algorithms of the system, and completed all tests under the supervision of the customer's site, obtaining the data that the customer wanted, and the experiment was successful at one time! All of the above SER equipment development and SER experiments were independently led by Jifeng Electronics in mainland China.
The Vice President of Customer Quality praised: "It exceeded expectations! I didn't expect it! SER experiments are necessary for foundries, but they are not routine experiments. In theory, every wafer fab in China should do this experiment at every process node. Only by obtaining first-hand SER reliability data can we have greater confidence in the reliability of our products and be responsible for the high quality of our customers. The Jifeng Electronics team is so powerful! You have solved our urgent problems, and you are the only one in China!"
Figure 7: Particle distribution under nuclear fission
(Single particles in the universe are very difficult to capture, so Jifeng Electronics uses neutron source nuclear radiation to induce SER)
The SER experiment designed by Jifeng Electronics uses Jifeng Engineering's quick sealing to quickly package the wafer products, fix them on the PCB board by welding, accurately locate the chip under test under the irradiation of a real high-intensity neutron source, accurately read all bit reversal error data of the chip under test under a specific radiation intensity, and complete the error probability calculation. It can provide reliable SER data for chip-level and system-level customers to calculate the chip error probability and system error probability under nuclear radiation. The entire SER solution, including hardware, software, algorithms, and timing control, is 100% designed and implemented exclusively by Jifeng Electronics. After inspection: the system runs stably under nuclear radiation, and can remotely transmit the on-site results to the control room tens of meters away (safety requirements for the human body to stay away from nuclear radiation) in real time for engineers to judge on site. From the beginning of the design of this system, full consideration was given to how to avoid error reversal caused by radiation on the test platform, and how to specially design to avoid noise caused by radiation from other peripheral circuits. Therefore, the error data obtained are all from the chip under test, so the solution and data are recognized by customers as effective and reliable.
Figure 8: In the 0x55 use case, Jifeng software can compare each soft error data format demonstration
In the neutron irradiation experiment, Jifeng Electronics' SER verification system detected frequent bit error reversals caused by the increase in neutron flux power. This phenomenon is very similar to a scene in the drama "Chernobyl": an advanced robot soon crashed after reaching the radiation area and could not work at all. The main purpose of this experiment is to test the chip's bit error rate SER under different radiation intensities, different operating voltages, and multiple test data types. All test data are recorded by the system and can be further analyzed by customers in later analysis, which will help customers design more radiation-resistant chips and systems.
This experiment also shows that as long as customers need it, Jifeng can provide complete SER software and hardware development and experimental capabilities to all customers, including system manufacturers, complete machine manufacturers, wafer factories, packaging factories, design companies, etc.
If you have any engineering technical needs, please contact Giga-Force Electronics (www.giga-force.com) or send an email to sales@giga-force.com.
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