How to display 8 digits in decimal on a seven segment display?

The seven-segment display can be used as a Verilog console in DE2 to output hexadecimal results.

Introduction
Usage environment: Quartus II 7.2 SP3 + DE2 (Cyclone II EP2C35F627C6)

Simply use the switch as a binary input and use an 8-digit seven-segment display to display the decimal result.

switch_seg10.v/Verilog

1/*
2 (c) OOMusou 2008
3
4 Filename : switch_seg10.v
5 Compiler : Quartus II 7.2 SP3
6 Description : Demonstrates how to use 8-bit 7-segment display decimals
7 Release : 07/20/2008 1.0
8 *
9 Module switch_seg10 (
input 10 [17:0] SW,
output 11 [6:0] HEX0,
output 12 [6:0] HEX1,
output 13 [6:0] HEX2,
output 14 [6:0] HEX3,
output 15 [6:0] HEX4,
output 16 [6:0] HEX5,
output 17 [6:0] HEX6,
output 18 [6:0] HEX7
19);
20
21 seg7_lut_8 u0 (
22 .i_dig (SW),
23 .o_seg0 (HEX0),
24 .o_seg1 (HEX1),
25 .o_seg2 (HEX2),
26 .o_seg3 (HEX3),
27 .o_seg4 (HEX4),
28 .o_seg5 (HEX5),
29 .o_seg6 (HEX6),
3 0 .o_seg7 (HEX7)
31);
32
33 endmodule

This is the top level module responsible for creating and instantiating seg7_lut8.

switch_lut.v/Verilog
1/*
2 (c) OOMusou 2008
3
4 Filename : switch_lut.v
5 Compiler : Quartus II 7.2 SP3
6 Description : Demonstrates how to use 8-bit 7-segment display with decimal
7 Release : 07/20/2008 1.0
8 *
9 module seg7_lut(
10 inputs [3:0] i_dig,
11 outputs reg [6:0] o_seg
12);
13
14 always @ (i_dig) begin
15 case (i_dig)
16 4 ' h1 : o_seg = 7 ' b111_1001; // ---t----
17 4 ' h2 : o_seg = 7 ' b010_0100; // | |
18 4 ' h3 : o_seg = 7 ' b011_0000; // Lt rt
19 4 ' h4
: o_seg = 7 ' b001_1001; // | | 20 4 ' h5 : o_seg = 7 ' b001_0010; // ---m----
21 4 ' h6
: o_seg = 7 ' b000_0010; // | seg = 7 ' b111_1000; // lb rubidium
23 4 ' h8 : o_seg = 7 ' b000_0000; // | |
24 4 ' h9 : o_seg = 7 ' b001_1000; // ---b----
25 4 ' ha : o_seg = 7 ' b000_1000;
26 4' hb: o_seg = 7' b000_0011;
27 4' hc: o_seg = 7' b100_0110;
28 4' hd: o_seg = 7' b010_0001;
29 4' he: o_seg = 7' b000_0110;
30 4' hf: o_seg = 7' b000_1110;
31 4' h0: o_seg = 7' b100_0000;
32 endcase
33 end
34
35 endmodule
36

This is a lookup table for a seven segment display.

switch_lut_8.v

1/*
2 (c) OOMusou 2008
3
4 Filename : switch_lut_8.v
5 Compiler : Quartus II 7.2 SP3
6 Description : Demonstrates how to use 8-bit 7-segment display decimal
7 Release : 07/20/2008 1.0
8 *
9 module seg7_lut_8 (
output 10 [6:0] o_seg0,
output 11 [6:0]
o_seg1, output 12 [6:0] o_seg2,
output 13 [6:0] o_seg3,
output 14 [6:0] o_seg4,
output 15 [6:0] o_seg5, output
16 [6:0] o_seg6,
output 17 [6:0] o_seg7,
input 18 [31:0] i_dig
19);
20
21 seg7_lut u0 (
22 .i_dig (i_dig%10),
23 .o_seg (o_seg0),
24);
25
26 seg7_lut u1 (
27 .i_dig ((i_dig or 10)%10),
28 .o_seg (o_seg1)
29);
30
31 seg7_lu t u2 (
32 .i_dig ((i_dig/100) %10),
33 .o_seg (o_seg2)
34);
35
36 seg7_lut u3 (
37 .i_dig ((i_dig/1000) %10),
38 .o_seg (o_seg3)
39);
40
41 seg7_lut u4 ( 42 .i_dig ((i_dig/10000) %10)
,
43 .o_seg (o_seg4)
44);
45
46 seg7_lut u5 ( 47 .i_dig ((i_dig/100000) %10), 48 .o_seg (o_seg5) 49); 0 51 seg7_lut u6 ( 52 .i_dig ((i_dig/1000000) %10), 53 .o_seg (o_seg6) 54); 55 56 seg7_lut u7 ( 57 .i_dig ((i_dig/10000000) %10), 58 .o_seg (o_seg7) 59); 60 61 endmodule

Compared with (Original) How to display 8-digit numbers in binary on a seven-segment display? (SOC) (Verilog) (DE2) and (Original) How to display 8-digit numbers in hexadecimal on a seven-segment display? (SOC) (Verilog) (DE2)
, the key difference lies in switch_lut_8.v. Since the switch input is binary, displaying binary means sending each bit to a seven-segment display, and displaying hexadecimal means sending every 4 bits to a seven-segment display, but what about decimal?

For example, if the switch input is 378 in decimal, if you want to get the tens digit 7, you can use 378/10 = 37, and then 37% 10 = 7. In this way, you can get the tens digit 7. The same goes for the other digits.