Design of asynchronous motor control system development platform based on DSP+CPLD

With the continuous development of power electronics technology, motor control theory and microcontrollers, modern AC speed control technology has been widely used in the national economy. At present, high-performance speed control strategies and modern control theories have been gradually applied to the field of AC motor control. Ordinary motion control systems can no longer meet the requirements of high-performance speed control. The establishment of an asynchronous motor control system development platform with DSP+CPLD as the control core is of great significance for the study of high-performance motion control strategies. It can not only reduce the system size, but also realize complex real-time control and improve the system computing power. This development platform can facilitate users to quickly complete the development and application of motor control system products.

1 Overall design of development platform hardware

1.1 Overall design and features of the development platform

The development platform uses three-phase asynchronous motor as the controlled object, controller TMS320F2812 and complex programmable logic device CPLD as the control core. The main circuit is a typical three-phase AC-DC-AC voltage source inverter circuit. The diodes form a three-phase bridge rectifier circuit, and the DC voltage is obtained after filtering. The intelligent power module (IPM) is used as the main switching device of the inverter to output three-phase AC power with a certain frequency and voltage to power the asynchronous motor.

DSP has abundant on-chip resources and efficient data processing capabilities, and runs at a high speed, so it also requires fast coordination of peripheral components. If the peripheral components are controlled by special circuits, it can not only expand the functions of DSP, but also reduce the complexity of the system and improve the control accuracy of the system.

Complex programmable logic devices have abundant logic resources and are more suitable for completing various algorithms and combinational logic. They have the advantages of many I/O ports, flexible design, large scale, fast speed, and powerful logic processing capabilities. If they are used alone to form a variable frequency speed regulation system, the development cycle will be long and the cost will be expensive. Altera's MAX IIZ CPLD has many key advantages. Advanced functions and zero power consumption are achieved in a single device. Advanced system features exceed those of traditional macro unit CPLDs, including user flash memory, internal oscillators, cost optimization, greater density, smaller packaging, and lower power consumption. Based on the above reasons, and considering the versatility of subsequent system development and the realization of various control schemes, the control circuit uses DSP+CPLD as the control core and adopts

The TMS320F2812 chip implements various complex control algorithms for asynchronous motors, and the CPLD implements the logic control of peripheral circuits. It not only meets the high-performance requirements of system control, but also reduces the processing burden of DSP, allowing DSP to centrally process system control algorithms, simplifying the logic circuit and improving the reliability of motor operation.

The hardware principle of the asynchronous motor control system development platform based on TMS320F2812+CPLD is shown in Figure 1.

Figure 1 Development platform hardware design structure diagram

Compared with ordinary control systems, this control system development platform has the following characteristics:

(1) DSP and CPLD coordinated control can give full play to their respective advantages and achieve high-performance speed control of the motor.

(2) The motor control system composed of DSP and complex programmable logic devices has developed more intelligently.

(3) The control system development platform has a flexible control scheme, strong programmability, rich reserved ports, and is easy to expand. It can not only control asynchronous motors, but also other high-performance motors. The system is easy to upgrade and maintain.

(4) By using this control system development platform, the product development cycle can be shortened, development costs can be reduced, development efficiency can be improved, and the development and application of motor control system products can be completed in a short time.

(5) The output signals in the form of switch quantities of the control circuit of the control system development platform are all connected to the system main circuit interface through optocoupler isolation, ensuring the isolation of strong and weak electricity. The system has high stability and can meet the requirements of high system reliability in the field of motor control.

1.2 Circuit design of each module

1.2.1 Main circuit

The main circuit is a typical three-phase AC-DC-AC voltage source inverter circuit, which supplies power to the inverter and switching power supply through a three-phase uncontrolled rectifier circuit. Intelligent power module (IPM) is used as the main switch device of the inverter, which has few peripheral components, simple structure and high reliability. At the same time, it is equipped with comprehensive protection measures to ensure the reliable operation of the system.

(1) Inverter circuit.

The inverter circuit of the development platform is a typical three-phase AC-DC-AC voltage source inverter circuit, using Mitsubishi's intelligent power module (IPM) PM50RL1A120, which has a withstand voltage of 1200 V and a rated current of 50 A. It integrates a three-phase fully controlled bridge composed of 6 high-speed, low-power IGBTs and an IGBT for braking, as well as overvoltage, overcurrent and overheating fault detection and protection circuits, and sends the detection signal to the DSP for interrupt processing. The signals output by the controller all enter the IPM through the optical coupler isolation circuit, effectively suppressing system interference.

(2) Voltage and current detection circuit.

Voltage and current detection circuits are designed on the DC side of the inverter circuit and the AC side of the output. The voltage and current signals are obtained through the Hall voltage and current sensors, and are sent to the ADC module of the DSP after isolation and amplification for A/D conversion to achieve closed-loop control of the system. When the system has overcurrent or overvoltage, the circuit can quickly send a low-level signal to the PDPINT protection pin of the DSP to block the PWM pulse output and avoid system failure.

1.2.2 Control Circuit

The control system development platform is mainly used to complete various complex asynchronous motor speed control algorithms and accelerate the development and application of motor control system products. The connection between DSP and peripheral circuits can be completely controlled by CPLD, and DSP and CPLD communicate in bus mode. As an extension of the system DSP chip, CPLD can complete many logic control and I/O expansion tasks. CPLD can be set to have an address decoder function, decode the address signal output by DSP, input CPID through the address bus, select the peripheral circuit to control it, and realize the control of SRAM, LED, and IED read and write signals.

TMS320F2812 is the latest 32-bit fixed-point DSP controller launched by TI. It adopts improved Harvard structure and has high-speed data processing capability. It integrates a wealth of motion control dedicated peripherals: PWM generation circuit, SVPWM state machine, programmable dead zone, comparison/capture unit, etc. Other functional peripherals: A/D conversion unit, SCI, SPI, CAN controller, etc., suitable for use in the field of high-precision servo control.

Altera's MAX IIZ series EPM57OZM144C7N uses MBGA package, has 144 pins and 116 user-available I/O ports, 440 typical equivalent macro units, DSP voltage matches the chip, and provides a JTAG interface for ISP programming. It has powerful logic processing capabilities and simplified peripheral logic circuits.

(1) Power module.

TMS320F2812 uses dual power supply. The system first powers up all +3.3 V I/Os, and then turns on the 1.9 V core power supply. In view of such power supply requirements, the dual power supply chip TPS767D301 provided by TI is selected to power the DSP. This chip has dual outputs, one output is a constant 3.3 V voltage, and the other output is an adjustable voltage, to achieve the DSP power supply timing requirements. The TPS3823S chip is used to implement power supply monitoring and manual/automatic reset, monitor program operation, and prevent the program from falling into an infinite loop. The TPS767D301 level output circuit is shown in Figure 2.

Figure 2 TPS767D301 level output circuit

1OUT=（1+R1／R2），2OUT=3.3 V. In the formula, VREF=1.183 4 V. By selecting appropriate resistance values ​​of R1 and R2, an adjustable voltage can be obtained.

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(2) Memory module.

When completing various control strategies and data processing of various algorithms on the system development platform, a lot of temporary data will be generated. If it is only borne by the DSP on-chip RAM, it will increase the burden on the DSP, reduce the system control accuracy, and limit the complete operation of the system. In order to meet the data storage needs, a SARAM model IS61LV516 is expanded. Through the chip select signal generated by the CPLD address decoding, it can be designated as a program memory or data memory.

(3)CPLD module.

CPLD plays a role in logic control in this development platform. It can perform: 1) QEP signal processing, the input is the speed position signal provided by the speed position sensor, the DSP gives the PWM pulse width modulation signal, and the output is the control signal of each IGBT drive module, which enters the IPM through the optocoupler isolation circuit. The motor position and speed signal detected by the orthogonal encoder is sent to the DSP, and the speed and direction of the motor are obtained through its internal QEP circuit, realizing the feedback control of the system and the output of PWM control signal, thereby achieving speed closed-loop control. 2) Address decoding, address decoding of the address signal output by the DSP, realizing the chip selection function of the F2812 peripheral expansion chip, and selecting the corresponding peripheral chip to map to the F2812 memory. 3) DSP I/O expansion, if the system controls multiple motors at the same time, the DSP's own I/O pins cannot meet the requirements and need to be expanded through CPLD. CPLD processes the orthogonal encoding signal of another motor, completes the frequency multiplication and pulse counting of the orthogonal signal, and outputs the counting result at the same time as the basis for judging the motor speed and position.

(4) Display module.

In order to ensure the reliable operation of the system, through the cooperation of DSP and CPLD, the LCD liquid crystal display interface circuit is designed to control the LCD display and the display of the LED indicator light, realize the human-machine interface of the system, and make the system have a good human-machine operation interface. The liquid crystal module uses the SMG12864ZK standard Chinese character and graphic dot matrix liquid crystal display module of Changsha Sun People Electronics Co., Ltd., which can display 128×64 dot matrix or 8×4 lines of Chinese characters. The interface circuit between DSP and LCD is shown in Figure 3.

Figure 3 Interface circuit between DSP and LCD

The reset signal /RST and chip select signal RS of the LCD are generated by the DSP control signal after being decoded by the CPLD. The data lines DB[0]~DB[7] are driven by the data lines DATA[0]~DATA[7] of TMS320F2812 through the bidirectional bus of the CPLD. Other signals with the same name are connected accordingly.

(5) Protection module.

The protection module mainly provides a blocking signal in time when the system is powered on/off or a fault occurs, ensuring the safe and reliable operation of the system. The protection circuit of the development platform has bus overvoltage protection, overcurrent protection, motor overheating, and IPM fault signal processing functions. The system's protection signal can also be integrated into the CPLD logic. When a fault occurs, the CPLD's PWM output can be quickly cut off in real time.

At the same time, in order to expand the application scope of the hardware system, signal acquisition circuits that may be used by different motors and different control strategies other than asynchronous motors, as well as interface circuits used by different position feedback devices, are designed.

2 Overall design plan of development platform software

The software development and debugging of the development platform are carried out under TI's DSP integrated development environment CCSC2000. The software programming of the entire control system is carried out in C language. The modular design method makes programming and use convenient and flexible. Using this control system development platform, control algorithms such as asynchronous motor vector control and direct torque control can be easily realized through software programming.

The development tool of CPLD is Max PlusII software, VHDL language programming, after automatically generating fuse files according to the specified pin configuration, the CPLD device is downloaded and programmed. Each module in the program works in strict sequence, and each module works in parallel to complete different actions.

The system control program is divided into two parts, namely the main program and the interrupt service subroutine. The main program enters the loop after completing the initialization. The interrupt service subroutine mainly completes various control strategies of the system, including motor stator current and voltage sampling, and completes the A/D conversion of current and voltage. The orthogonal encoding unit is used to process the speed feedback signal. According to various control algorithms, the PWM signal is output to control the motor torque. The flow chart of the system main program is shown in Figure 4.

Figure 4 System main program flow chart

3 Conclusion

The motor development platform built by combining DSP with CPLD is suitable for the implementation of asynchronous motor control algorithms. With DSP as the main controller and CPLD as the auxiliary function expansion, the entire control system development platform has strong expansion capabilities and high flexibility, which not only saves costs and shortens the system development cycle, but also improves development performance.