1 Overall design of the system
The system uses TMS32F2812 processor chip with a main frequency of up to 150 MHz and a clock period of 6.67 ns. It has 2×8 ADC conversion channels, SPI serial port, two 1 kb×16 SARAM modules, etc. These modules are easy to implement ADC sampling, data exchange between master and slave control chips, and large-capacity SARAM space required for FFT transformation.
The overall design of this system is shown in Figure 1. Dual-machine hot standby is adopted, and the two channels simultaneously sample and demodulate the conditioned FSK signal and output it in a more consistent manner, which can improve the reliability of the system.
2 Main technical implementation
2.1 Signal Conditioning
Signal conditioning mainly uses low-pass filters. The design of low-pass filters uses MicroChip filter design software FilterLab. The software only needs to input the passband frequency and the order of the filter to generate the corresponding circuit diagram, eliminating the complex calculations in filter design. Figure 2 shows a Butterworth low-pass filter generated by FilterLab software, with an order of 4 and a passband frequency of 4,000 Hz. The figure shows the recommended values of the filter capacitors and resistors.
2.2 Signal Sampling Design
Due to the use of the internal A/D of TMS320F2812, in actual application, it is found that the internal A/D sampling error is large, up to 9%, which is far from meeting the sampling accuracy requirements and needs to be corrected by software. First, select any two channels of the ADC as reference input channels, and input known DC reference voltages respectively. Obtain the conversion value by reading the corresponding result register. The correction gain and correction offset of the ADC module can be obtained using the two sets of output values, and then use these two values to compensate for the conversion data of other channels. The specific compensation formula is shown in equations (3) to (6)
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2.3 Signal Processing Module Design
The signal processing module is mainly composed of undersampling, FFT transformation and Rife frequency adjustment. The flow of the signal processing module is shown in Figure 3, where shifting, filtering, decimation and FFT constitute Z-EFT.
The FFT function library of TI is used in the FFT transformation. The FFT program is modularized, which is easy to modify a large number of FFT transformations, and has fast operation speed and high execution efficiency. The FFT transformation mainly consists of module initialization and FFT calculation.
After FFT transformation, there are two sampling points in the frequency main lobe, and the center frequency must be between these two points. Using the Rife frequency estimation method for spectrum analysis can obtain accurate frequency estimation values. The Rife frequency estimation method uses the maximum value G(k) of the absolute value of the spectrum for comparison, and obtains the maximum value |G(k)| in k=[0, (N-1)/2], and compares |G(k-1)| and |G(k+1)|. If |G(k-1)|<|G(k+1)|, then α=-1, otherwise α=1. The spectrum estimation value is shown in formula (9), where fs is the sampling frequency.
3 Experimental data analysis
The low frequency and carrier frequency measurement data of ZPW-2000A are shown in Table 1.
According to the measurement data, the carrier frequency error is within 0.2 Hz and the low-frequency frequency error is within 0.02 Hz, and the accuracy is higher than the relevant regulations of the Ministry of Railways.
4 Conclusion
Demodulate the frequency shift keying signal of ZPW-2000A, directly perform FFT transformation on the carrier frequency, and measure the carrier frequency; then perform shifting, filtering, FFT transformation and Rife frequency adjustment to demodulate the low frequency. The demodulated frequency is very high, and the FFT algorithm uses the TI algorithm library, which has high operating efficiency and strong real-time performance. This system uses dual-machine hot standby to improve the reliability of the equipment.
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