Designers have always faced intense time-to-market pressures when developing products for rapidly evolving markets such as consumer electronics and automotive, but now these stringent time requirements have migrated to many other areas, including embedded control and industrial design.
Undoubtedly, the most talked-about chip design trend in recent years is the shift to system-on-chip (SoC), which has been made possible by the rapid advancement of process technology and design methods. However, the development of SoC is still slow and very sensitive to market changes. In addition, developing SoC is essentially a costly and high-risk business. Few companies have sufficient resources to afford the non-recurring engineering expenses (NRE) required to develop SoC products into mass production, and even if a company has sufficient resources, it must carefully consider the opportunity to obtain a return on investment.
The desire to get products to market quickly is so important in the industry that every week of delay in selling a product can cost revenue: if the average selling price of a product is $1,500, for example, and its manufacturer expects sales to rise to 100 units per week, a three-month design delay could cost more than $1 million.
Therefore, designers look to field programmable gate arrays (FPGAs) as a flexible industrial design platform. This trend is even more evident in industrial wireless communication design. In this application, application-specific standard products (ASSPs) were initially considered, followed by application-specific integrated circuits (ASICs). However, when considering issues such as time to market, implementation flexibility, and future obsolescence, the design team decided to turn to FPGAs for project implementation.
Entering the embedded market
As we might expect, time-to-market pressures are not the only driving force that has led designers to turn to programmable logic devices to gain value-added functionality in industrial designs. Today’s manufacturing processes have enabled a new generation of programmable logic devices that offer more and higher-speed logic and faster I/Os at lower price points. As a result, FPGAs are now being used in embedded applications that, in the past, were only accessible to ASICs or ASSPs due to performance reasons.
Today's high-function FPGAs are no longer limited to introducing system glue logic, but can also be used as SoC platforms, allowing industrial designers to easily modify them to make changes, fix defects, or create future derivative products when users need to upgrade and match market development. Designers who previously chose semi-custom ASSPs no longer need to accept less than ideal solutions in their applications, but can build custom FPGA-based solutions faster than using ASICs, while adapting to changing market needs.
Another reason for the increase in FPGA usage is the greatly increased number and range of IP blocks that can be programmed into the device, including a variety of standard functions such as the 8051 microcontroller that is widely used in industrial applications. These pre-verified and tested IP blocks are optimized for programmable logic applications, allowing designers to quickly build systems and program them into FPGAs. IP cores are usually provided in the form of netlists or RTL resources, so designers can quickly use them without changes, or configure them according to design requirements.
For example, Actel's Core8051 IP core is compatible with the 8051 instruction set, allowing designers to leverage their experience in existing microcontroller architectures and take advantage of the large amount of existing code and tools to further shorten the development cycle. Usually, such cores have additional features: For example, Core8051 has on-chip debugging capabilities, which can simplify system debugging when the core is deeply embedded, helping designers to launch products to the market faster. [page]
IP platform came into being
In volumes of less than 100,000 units per year, FPGAs can be an excellent platform that meets the needs of many industrial and embedded control market segments. The development of microcontroller-based SoCs has been driven by two main factors: the number of components or peripherals that need to be integrated, and the integration of application software and proprietary drivers for the selected components. Ideally, designers would like to reduce development time by reducing the number of steps and components. In addition, they would simplify the integration of application software. Using a synthesizable or "soft" IP platform within an FPGA is a modern solution to simplify the design process and reduce time to market. In the flowchart (Figure 1), we compare the key steps of building a microcontroller SoC using a large number of IP cores with the steps required to develop an FPGA design using an IP platform.
Figure 1. Comparison of building SoC based on IP and developing FPGA.
The design concept of IP platforms is to integrate multiple components into a dedicated module. These component modules and platforms have been pre-integrated and pre-verified. Of course, the main problem with IP pre-built modules is that users may not want to integrate all the components and features of the platform. The solution to this problem is to make not only the component modules but also the key product features of these component modules configurable.
In fact, Actel's Core8051 is part of this pre-verified, configurable platform, called Platform8051. In addition to the 8-bit Core8051 microcontroller, it includes five other IP units: Core10/100, CoreSDLC, CoreI2C, CoreSPI, and Core16X50. (See sidebar "IP core resources in Platform8051") Designers can specify any configuration of these IP cores to implement a unique SoC design, while the time and cost required to develop an ASIC is only a fraction of the time and cost.
In embedded control applications, the component cores included in Platform8051 are commonly used peripherals because they allow designers to implement key functions such as sensing, control, monitoring and communication. Through these pre-verified units, designers can easily reuse IP without spending time repeatedly developing and integrating the same core into the platform. Using Platform8051, the design team can use valuable design and verification time to develop value-added application software and peripherals to make the final product more distinctive. [page]
Development environment support
Designers need development tools to create FPGAs and application code for the 8051. Actel's Libero design environment allows designers to simulate and synthesize the complete integrated RTL, then simulate and analyze the design at the netlist level, and perform place and route using Actel's Designer software. Finally, the FPGA is programmed using Actel's FlashPRO or Silicon Sculptor programmers.
For microcontroller programming and debugging, Actel has partnered with First Silicon Solutions (FS2) and Keil Software. The FS2 System Analyzer is designed to support in-circuit debugging of application software using the special features and integrated peripherals of the Actel Core8051 microcontroller. An extension of the FS2 On-Chip Instrumentation (OCI)—the dedicated “silicon hook”—will be integrated into the Core8051 MCU, allowing FS2 to offer advanced and powerful debugging tools. The μVision Integrated Development Environment (IDE) from Keil combines project management, source code editing, and program debugging into a powerful development environment. The μVision debugger is powerful and comprehensive, allowing software developers to fully emulate the target program on a PC.
Figure 2, Platform8051 platform architecture.
In addition to software development tools, Actel also provides the Platform8051 development kit, shown in Figure 2, which enables designers to observe the operation of the Actel core and quickly and efficiently create and simulate derivative designs. This kit can significantly reduce system verification time. It also includes a reprogrammable ProASICPLUS FPGA, the previously mentioned network server design programmed on the device, network server code examples, all corresponding cables, FS2 System Analyzer and Keil μVision evaluation software packages, and optional FlashPRO Lite programmers.
Influencing designers’ decisions
The advantages of FPGAs are evident in the use of platform IP, such as in a recent modular industrial wireless network designed for use in high-noise factory environments and manufacturing automation. The design team initially considered using discrete ASSPs, but quickly found that this approach did not provide the right combination of features while meeting size and power requirements.
In other words, designers can only choose between ASIC and FPGA. Project cost analysis studies show that for the expected module volume, the cost of ASIC and FPGA devices is close; but FPGA does not require any NRE investment. Therefore, the design team decided to adopt the FPGA solution.
When the design team considers the IP required for the project, it is more aware that FPGA has greater advantages in terms of cost and time to market. Since FPGA suppliers already have most of the IP required for the project, the design team only needs to develop a small amount of special IP. Using pre-developed and verified IP can shorten the design cycle by up to six months, allowing the design team to bring products to market faster and in a shorter time. And a shorter time to market can bring tangible financial results. Because the market share occupied by the product is greater than expected, sales and profits have increased significantly.
At the same time, design teams can customize modules according to the applications and specific needs of larger users, and perform field product upgrades without replacing the entire circuit board, which only requires reprogramming the FPGA. This can reduce the user's total cost of ownership, increase the perceived value of the product, and expand market demand.
Time-to-market pressures facing industrial designers have never been greater. Whether designing network interfaces, motor controllers, logic controllers, communication systems, or any of the hundreds of industrial applications, FPGAs combined with a wide variety of available IP are becoming the preferred solution for industrial design. FPGAs offer advantages over ASSP and ASIC solutions in terms of time to market, flexibility of implementation, and future product obsolescence. In addition, because many industrial applications never reach high volumes, FPGAs often offer greater cost savings than traditional ASIC solutions. The ability to quickly program functions and test them in an application, then reprogram as functional specifications change, is naturally attractive to industrial engineers. These features, combined with current advances in performance, size, and price, allow industrial designers to quickly bring products to market using familiar standards and maximize product retention time and sales revenue. [page]
Appendix: IP core resources in Platform8051
Core8051 is a full-featured single-cycle 8-bit microcontroller unit that is compatible with the popular ASM51 instruction code and can operate at frequencies above 40 MHz. Figure 2 shows a block diagram illustrating the features of this core. Core10/100 is an Ethernet media access controller that connects to a local area network at a data rate of 10 or 100 Mb/s, has a media independent interface (MII) for physical connection, and can implement a carrier sense multiple access with collision detection (CSMA/CD) algorithm in accordance with the IEEE802.3 standard. These two cores form the network server design used in the Platform8051 development kit.
CoreSDLC is a high-speed synchronous serial data link controller that operates similarly to the Intel 80C152 global serial channel operating in SDLC mode under CPU control. This core is used as a custom serial interface for embedded applications.
Figure a, Core8051 structure block diagram.
CoreI2C is a bus controller that provides a two-wire serial interface that supports the Philips I2C standard of 100 kb/s and 400 kb/s data transfer. This daisy-chain bus standard is used in many consumer electronics and embedded applications.
CoreSPI is a serial peripheral interface that enables synchronous serial data transfer between 8051 and peripheral devices. SPI is a point-to-point bus standard used in a variety of embedded applications.
The Core16X50 is a Universal Asynchronous Receiver/Transmitter (UART) with or without FIFO support, software compatible with the Texas Instruments 16550 device, and adds additional serial channels to the Core8051. It can also be used as a serial or modem interface.
Previous article:Implementing a 4G Wireless Spherical Detector in FPGA
Next article:Research and design of a multi-clock network-on-chip based on FPGA
Recommended ReadingLatest update time:2024-11-17 00:39
- Popular Resources
- Popular amplifiers
- Analysis and Implementation of MAC Protocol for Wireless Sensor Networks (by Yang Zhijun, Xie Xianjie, and Ding Hongwei)
- Wireless Sensor Network Technology and Applications (Edited by Mou Si, Yin Hong, and Su Xing)
- MATLAB and FPGA implementation of wireless communication
- Modern Electronic Technology Training Course (Edited by Yao Youfeng)
- Huawei's Strategic Department Director Gai Gang: The cumulative installed base of open source Euler operating system exceeds 10 million sets
- Analysis of the application of several common contact parts in high-voltage connectors of new energy vehicles
- Wiring harness durability test and contact voltage drop test method
- Sn-doped CuO nanostructure-based ethanol gas sensor for real-time drunk driving detection in vehicles
- Design considerations for automotive battery wiring harness
- Do you know all the various motors commonly used in automotive electronics?
- What are the functions of the Internet of Vehicles? What are the uses and benefits of the Internet of Vehicles?
- Power Inverter - A critical safety system for electric vehicles
- Analysis of the information security mechanism of AUTOSAR, the automotive embedded software framework
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
- Innolux's intelligent steer-by-wire solution makes cars smarter and safer
- 8051 MCU - Parity Check
- How to efficiently balance the sensitivity of tactile sensing interfaces
- What should I do if the servo motor shakes? What causes the servo motor to shake quickly?
- 【Brushless Motor】Analysis of three-phase BLDC motor and sharing of two popular development boards
- Midea Industrial Technology's subsidiaries Clou Electronics and Hekang New Energy jointly appeared at the Munich Battery Energy Storage Exhibition and Solar Energy Exhibition
- Guoxin Sichen | Application of ferroelectric memory PB85RS2MC in power battery management, with a capacity of 2M
- Analysis of common faults of frequency converter
- In a head-on competition with Qualcomm, what kind of cockpit products has Intel come up with?
- Dalian Rongke's all-vanadium liquid flow battery energy storage equipment industrialization project has entered the sprint stage before production
- Allegro MicroSystems Introduces Advanced Magnetic and Inductive Position Sensing Solutions at Electronica 2024
- Car key in the left hand, liveness detection radar in the right hand, UWB is imperative for cars!
- After a decade of rapid development, domestic CIS has entered the market
- Aegis Dagger Battery + Thor EM-i Super Hybrid, Geely New Energy has thrown out two "king bombs"
- A brief discussion on functional safety - fault, error, and failure
- In the smart car 2.0 cycle, these core industry chains are facing major opportunities!
- The United States and Japan are developing new batteries. CATL faces challenges? How should China's new energy battery industry respond?
- Murata launches high-precision 6-axis inertial sensor for automobiles
- Ford patents pre-charge alarm to help save costs and respond to emergencies
- New real-time microcontroller system from Texas Instruments enables smarter processing in automotive and industrial applications
- UPC1185H is a simple and easy-to-make power amplifier
- Question: How to paste the attachment
- 3G Wireless Broadband Communication Network Learning Materials
- EEWORLD University - High-Speed Transimpedence Amplifier Design Process
- PCB
- It seems that a problem with gcc compiling threadx has been discovered
- Please help analyze this statement IS_RCC_APB2_PERIPH(PERIPH)
- Recommended MCU with larger on-chip RAM
- ART-Pi Evaluation RTE Environment Build RTOS Project
- Newcomer report!