Design of Fully Digital UPS Inverter Based on DSP Control

1 Introduction

With the continuous development of information processing technology, especially the widespread application of computers and the rapid development of the Internet, the reliability requirements of power supply systems are getting higher and higher, so the requirements for the technical indicators of uninterruptible power supplies (UPS) are also getting higher and higher. The core part of UPS is a constant frequency and constant voltage inverter. Since traditional analog control requires the use of a large number of discrete components, aging and temperature drift seriously affect the long-term stability of the system. Digital control technology based on DSP can greatly improve the consistency of products, increase the flexibility of control, and improve the stability and reliability of the entire system ^[1] . This paper mainly proposes a digitally controlled UPS inverter structure and discusses the parameter design of the control system in detail.

2 System Structure

Figure 1 is the block diagram of the digital control UPS inverter proposed in this paper. The main circuit adopts a full-bridge structure, and the control circuit is a fully digital controller based on TI's motor control dedicated DSP chip TMS320F240 ^[2] . Lf and Cf are the output filter inductor and filter capacitor of the inverter, and rL and rC are the series parasitic resistance of the filter elements. Considering the control accuracy and product cost, the control system adopts a system control method of resistor sampling and common grounding of the main power circuit and the control circuit. Rs1 and Rs2 are output voltage sampling resistors, and Rc is the inductor current sampling resistor. The voltage and current sampling signals are input to the A/D conversion port of the DSP through the sampling network. The PWM module of the DSP outputs 4 PWM signals, which drive 4 IGBT tubes after passing through the drive circuit.

3 Control system design

3.1 Digital Dual-Loop Controller Structure

There are many schemes for controlling inverters ^[3] . The UPS inverter in this paper adopts the digital dual-loop PI control method of the inductor current mode. The specific inverter digital control block diagram is shown in Figure 2. The dotted box in the figure is divided into the main circuit of the inverter. Vref is the sine wave data table stored in the DSP program space, and VAB is the voltage between the midpoints of the two bridge arms of the inverter bridge. In order to suppress the high-frequency noise in the feedback quantity and improve the sampling accuracy, a resistor-capacitor low-pass filter is added to the feedback channel. The output of the voltage error signal after digital PI adjustment is used as the instruction of the current loop, and the current error signal is proportionally adjusted to obtain the current loop output. The current loop output is compared with the triangle wave generated by the timer to obtain four gate pulses.

3.2 Current loop and voltage loop parameter design

FIG3 is a simplified block diagram of the current inner loop. Zoh is a zero-order holding link, and its s-domain transfer function is , where Ts is the sampling period.

The voltage and current sampling periods designed in this paper are both 50μs. The open-loop pulse transfer function of the current loop is:

Figure 4 is a simplified block diagram of the voltage outer loop control. Where is the general form of the pulse transfer function of the voltage outer loop digital PI controller, K ₁ －K ₂ =K _I T _s , and K _I is the integral coefficient.

Since the tracking speed of the current inner loop designed above is much faster than that of the voltage outer loop, the following reasonable simplification is made when designing the voltage outer loop: Assuming that the inductor current can already track the command current, it can be assumed that the current inner loop is a unit proportional link 1, so that the open-loop pulse transfer function of the voltage outer loop is: (ignoring the series resistance rC of the capacitor), and the characteristic equation of its closed-loop transfer function is: . Similarly, according to the deadbeat control principle, let the characteristic root be 0, and K1 can be an arbitrary constant. K1 can be determined based on the relationship between K1 and K2 and combined with the simulation method.


In the above control parameter design process, a simplified block diagram of unit feedback is used. There must be a proportional link in the feedback channel of the actual line. Therefore, based on the above design, the control block diagram must be transformed according to the actual feedback ratio to obtain the final control link parameters.

3 Sampling Control Timing Design

Figure 5 is a timing diagram of a sampling control proposed in this paper. t0-t4 is a switching cycle. Due to the use of a frequency-doubled unipolar sinusoidal pulse width modulation method, the pulsation frequency of the output filter inductor is twice the switching frequency, which can reduce the size of the filter component. At t1, when the timer cycle is interrupted, the two A/D converters are started at the same time to sample the voltage and current feedback quantities. At t2, the A/D conversion is completed and the dual-loop control algorithm is immediately executed until t3. At t4, when the timer underflow is interrupted, the calculated comparison value CMPRx is loaded. Obviously, in this sampling control method, the control point is only delayed by half a switching cycle relative to the sampling point. Compared with the sampling control method reported in many literatures ^[4][5] that delays one switching cycle, the real-time performance of the control is greatly improved. This has been verified by simulation and experiments.

4 Simulation and experimental results

Table 1 lists some main parameters of the digital control inverter proposed in this paper.

Before conducting the actual experiment, the UPS inverter system was simulated using MATLAB's SIMULINK toolbox. Figure 6 shows the simulated waveforms of the output voltage and load current during load switching.

Figure 7(a) shows the steady-state experimental waveforms of the output voltage and inductor current under full load of 3kVA. The results are measured by LEM's clamp meter HEMEANALYST2060: THD = 1.4%. The experimental data show that the control system has good steady-state characteristics. Figure 7(b) shows the load voltage and load current experimental waveforms when switching from half load to full load, and Figure 7(c) shows the switching from full load to half load. The experimental waveforms are well matched with the simulation waveforms, indicating that the inverter can quickly adjust the output voltage to a steady state, indicating that the control system has good dynamic characteristics.

5 Conclusion

Compared with analog control technology, the full digital control technology based on DSP greatly simplifies the design of the control circuit and increases the flexibility of control. At the same time, the digital deadbeat control technology and the sampling control method with a delay of half a switching cycle are adopted, which greatly improves the dynamic characteristics of the inverter. Both simulation and experiments have verified the advancement and practicality of this full digital control solution based on DSP.