Designing the Control Circuit of Inverter Using CPLD

The control circuit of modern inverters mostly uses motor control dedicated microprocessors as the core of the control system, such as INTEL's 80C196MC, TI's TMS320F240, etc. With the continuous improvement of inverter performance and the continuous improvement of functions, when the on-chip resources of the microprocessor cannot meet the requirements, it is necessary to expand the peripheral circuit. Compared with the use of discrete components, the solution of using CPLD (complex programmable logic device) with ISP (in-system programmable) function to expand the peripheral circuit has obvious advantages in terms of circuit volume, flexibility and reliability. Based on the analysis of the typical structure of the inverter control circuit, this paper designs an inverter control circuit solution with TMS320F240 as the core and CPLD for peripheral circuit expansion, which shows that the use of CPLD can greatly improve the design of the inverter control circuit.

1. Introduction to XC9500 Series CPLD

XILINX's XC9500 series CPLD is based on CMOS technology and has ISP function. It has a minimum write/erase number of 10,000 times, can provide 36 to 288 macro cells, 800 to 6400 available gates, a minimum pin-to-pin delay of 5ns, and a maximum counter clock of up to 125MHz.

The XC9500 series CPLD consists of multiple function modules (FB) and input/output modules (IOB), and forms a fully interconnected subsystem through a wired switch matrix. FB is the core part of the device structure, and each FB consists of 18 independent macro units, and each macro unit can independently implement combinational logic or sequential logic;

IOB provides input and output buffers; the wiring switch matrix can connect the input and output signals of FB and IOB, and this connection relationship is completely determined by user programming.

As a typical representative of high-performance, low-price CPLD devices, the XC9500 series CPLD is very suitable for the design needs of inverter control circuits due to its advantages such as reliability, low price, strong anti-interference ability, large drive current and in-system programmability.

2. Features of TMS320F240

Most inverters require flexible and rich functions and interfaces, and generally use microprocessors as the core of the control circuit. Microprocessors with integrated PWM pulse generator functions are the most widely used in the design of inverter control circuits. TMS320F240, a digital signal processor (DSP) specially designed by TI for inverter control, is a typical representative.

TMS320F240 (hereinafter referred to as F240) consists of a DSP core and on-chip peripherals. Since the DSP core has a fast calculation and response processing speed, it can cope with the requirements of high-speed applications. At the same time, it also provides more powerful support for the design of control software, enabling the control system to complete more complex functions and achieve better control effects. At the same time, TMS320F240 has a wealth of on-chip peripherals, including 16-channel 10-bit A/D converters, multiple programmable multiplexed I/O pins, hardware UART and SPI bus. In particular, TMS320F240 has an event manager (EPA) on the chip, which can provide 6 full-comparison PWM channels, which can easily realize the generation of various PWM waveforms.

Combined with external pulse processing, protection, human-machine or dual-machine communication, operation control and data processing functional circuits, a comprehensive and complete inverter control system can be easily constructed with F240 as the core.

3. Typical structure of inverter control circuit

The typical structure of the inverter control system is shown in Figure 1.

(1) Generation and processing of PWM pulses Generate control pulses for IGBTs: Introduce protection signals to ensure reliable protection of IGBTs under fault and abnormal conditions.

(2) Monitoring and protection of operating status Monitor the operation of the inverter and implement corresponding protection when abnormalities and faults occur.

(3) Analog input and processing The analog quantity after electronic conversion, filtering, etc. is generally converted by the A/D converter inside the F240. Since most of the processing can be done by software, the hardware design of the analog input channel in the inverter control circuit is often simpler.

(4) Digital input and output Digital quantities include user given, operating status feedback, indication and switch quantity control, etc. They can be input and output through the I/O port inside the F240 or the external extended I/O port.

(5) Bus expansion and control logic are used to expand off-chip I/O ports and memory. The bus control logic for external bus expansion includes functions such as generating chip select and wait signals, and read and write control.

(6) Peripheral interfaces include serial communication interfaces, serial E2PROM, real-time clock, LCD or LED display, etc., which are often used to realize human-computer or dual-computer communication, information storage and display, etc. These are generally coordinated with external interface chips through software.

4. Typical applications of CPLD in inverter control circuits

With the increasing requirements for inverter control functions, reliability, cost and manufacturing efficiency, the hardware resources of F240 are becoming increasingly tight, including the need for more digital I/O interfaces, the need to expand external buses, and the realization of reliable inverter protection functions. These extended functions can certainly be realized by a combination of various discrete digital circuits, but this traditional design method has the disadvantages of complex circuits, low reliability, lack of flexibility, and inconvenience in debugging and maintenance.

Since CPLD can easily design and implement combinational logic and sequential logic circuits, it is fully capable of meeting the needs of F240 peripheral circuits and function expansion in the design of inverter control circuits, thereby greatly improving the design level of inverter control circuits. After adopting CPLD, the original bus logic and expansion, digital input and output, and digital parts of operating status monitoring and protection in the inverter control system can all be implemented by CPLD, and the entire system can be simplified to the form shown in Figure 2.

By comparing with Figure 1, it is not difficult to find that since CPLD can integrate many functions, its use can improve the inverter control circuit design mainly in the following aspects:

(1) The external bus structure of F240 is very simple, and the pins and functions of CPLD can be flexibly configured according to the actual situation and requirements of PCB board wiring, which can not only greatly simplify the design of the circuit board, but also greatly help improve the electromagnetic compatibility performance of the system. In addition, the reduction in the number of chips is not only beneficial to improving reliability and reducing circuit size, but also helps to reduce the cost of purchasing, generating, debugging and maintaining original components.

(2) All external logic functions are encapsulated inside the CPLD, which has good confidentiality. Since the F240 itself does not have any confidentiality function, using CPLD to keep the hardware circuit and even the entire control system design confidential is one of the simplest methods.

(3) Using a CPLD with ISP function, a system that has been designed and manufactured can be easily modified without abandoning the original circuit schematics and circuit boards, thus avoiding waste and reducing costs.

(4) Most external logic functions and pins are implemented by CPLD, which allows the development of circuit basic principles, circuit boards, and even software to precede and be independent of the specific external logic function design, thereby greatly improving the efficiency of product design, debugging, small-batch trial production, and experiments.

(5) CPLD can be used to flexibly and conveniently design the required protection functions (including fault classification protection, fault status preservation, etc.), thereby improving the system reliability and software operation efficiency.

5. CPLD specific function design and implementation

In the actual design, the CPLD selected is XC95144TQl00-7 of the XC9500 series, which has 144 macro cells and 81 fully programmable I/O pins. The development software used is Xilinx Foundation Series 3.li, a special development software of XINLINX Company, and is implemented in VHDL language. The configuration of its external I/O pin functions is shown in Table 1.

6. Conclusion

The use of CPLD with ISP function can greatly improve the design level of inverter control circuit, so that the system can better take into account the increasing requirements of reliability, miniaturization, low cost and high performance. At present, the inverter control system developed based on XC95144 and TMS320F240 has been successfully applied to the inverter power supply of the air conditioner of the 35kVA passenger car of the "Pioneer" 200km/h EMU, and has been running stably for more than a year, achieving good results.