1 Overall system design
Infusion monitoring system The principle is shown in Figure 1, including FPGA controller, drip speed detection, residual liquid volume detection, actuator, keyboard control, LCD display, voice communication (sending and receiving) and RS232 bus conversion.
Infusion control and voice communication are the main research contents of this paper, and are also the fundamental guarantee of the stability and reliability of this system. According to the system requirements, the design uses FPGA as the controller, optical fiber sensor and capacitive sensor as the detection mechanism, and stepper motor as the actuator. For safety and convenience, the RS232 bus is used to add voice communication and automatic alarm when infusion is completed.
2 Hardware
2.1 Controller Hardware Design
The controller main chip uses the APEX series FPGA chip from Altera , the chip model is Cyclone II EP2C35F672C6 . The FPGA chip adopts a 90 nm low-power design and a 672-Pin FineLine BGA package. It has 35 embedded 18×18 multipliers, 475 user pins, 4 PLLs , and 205 differential channels (the main frequency is twice that of C8, which can reach 400 MHz). The typical value is 1 million gates and the maximum value is about 1.6 million gates. The main processor uses Altera's 32-bit Nios soft-core processor. Compared with traditional embedded processors, NiosⅡ processors are more flexible. The chip has customization features and can be customized according to its own system requirements, performance requirements and cost requirements. The system bus adopts the AVALON bus standard. In addition, the system has peripheral expansion functions such as RS232 serial communication port, keyboard PIO, LCD display, etc., which facilitates the further development of the system, shortens the system development cycle, and reduces the system development cost [6].
About Altera
Altera's programmable solutions help system and semiconductor companies to innovate quickly and efficiently, highlight product advantages, and win market competition. Since inventing the world's first programmable logic device 20 years ago , Altera has been adhering to the tradition of innovation and is the world's "System on a Programmable Chip" (SOPC) solution advocate. Altera is headquartered in San Jose, California, USA, and has nearly 2,000 employees in 14 countries around the world. Its annual revenue in 2005 was as high as US$1.123 billion. Altera combines its programmable logic technology invented as early as 1983 with software tools, IP and design services to provide nearly 14,000 customers around the world with value-added programmable solutions.
Altera has always been at the forefront and leading in the field of programmable system-level chips, combining programmable logic technology with software tools, intellectual property (IP) and technical services to provide high-quality programmable solutions to more than 14,000 customers worldwide. Our new product line combines the inherent advantages of programmable logic - flexibility, timely product launch - with higher-level performance and integration, and is designed to meet the needs of today's wide range of systems. Altera programmable solutions include: The industry's most advanced FPGA, CPLD and structured ASIC technologies Fully embedded software Development tools The best IP cores Customizable embedded processors Ready-made development kits Expert design services
2.2 Keyboard Control
For easy operation, the system uses keyboard operation. The device implements a bidirectional synchronous serial protocol. The four most important lines in the interface are data line, ground line, power line and clock line. Inside the keyboard, there is a processor dedicated to scanning keys. It can detect whether a key is pressed or released after being pressed, and generate corresponding scan codes according to the type of key. The scan codes sent by the keyboard are of two types: make code and break code. When a key on the keyboard is pressed, the keyboard will generate a make code according to the type of key; when a key on the keyboard is pressed and released, the keyboard will generate another break code according to the type of key. This processor assigns a unique make code and break code to each key, so that the host can determine which key is pressed or released by looking for a unique scan code. The specific method is to start QuartusⅡ, create a project named ps2_keyboard.qpf, select the device, create a text file and write code to receive scan codes from the keyboard, require responses to different keys, allocate input and output pins for the device, and compile the project after completion.
As shown in Figure 2, the keyboard always generates a clock signal, and the data sent from the keyboard to the host is read at the falling edge of the clock signal. The keyboard's scan code is sent to the FPGA, and these scan codes are included in the data frame sent from the keyboard to the host. Each data frame includes 1 start bit (always low level), 8 data bits (i.e., scan code, sent from the low bit), 1 parity bit (odd parity), and 1 end bit (always high level).
2.3 Sensors
The drip speed detection uses a fiber optic sensor installed on the outside of the middle of the Moffitt dropper . Because the infrared receiving tube of the photoelectric sensor is easily disturbed by external light, and its diameter is generally above 2 mm, it is large in size and inconvenient to install. The measurement port area of the fiber optic sensor is small, and the diameter can be within 1 mm, and the resolution is high when the liquid is dripped. When the droplet passes, the light beam received by the fiber optic receiving tube changes by using the "blocking" of the droplet to the light, and then the speed pulse of the drip is obtained through circuit processing, and then the speed pulse collection information is sent to the controller. In order to prevent the infusion speed from being too fast and causing a continuous drip flow, two detection optical fibers are installed on the upper and lower sides respectively, so as to avoid the erroneous processing results caused by undercounting the number of pulses. As shown in Figure 3, circuit X is the fiber output voltage waveform, and Y is the fiber output voltage waveform. Under normal circumstances, only X is counted when the drip is discrete, and XY is counted at the same time when the drip is continuous. This method is safe, stable and reliable. When the drip is discrete, XY has only one high level, and the signal generated by the OR gate C1 as the control end of the D latch Q1 only allows the positive pulse generated by X to pass through, and the D latch Q2 is shielded because the Y signal is still at a low level when C1 acts, Q2 outputs a low level, and the gate circuit performs addition in the counter . When the drip is continuous, XY outputs a high level at the same time, and the D latch Q2 is also counting. OUT0 is the output, OUT1 is the carry, and Z is the control end input.
The residual liquid volume is detected by a linear capacitive grid sensor, and the installation position is shown in Figure 4. The fixed capacitive grid is installed on the base of the infusion system, and the sliding capacitive grid is installed on the screw nut of the lead screw driven by the stepper motor of the infusion system. The rotation of the lead screw causes the nut to move horizontally. The measurement principle is the same as that of a vernier caliper. This sensor has a fast response speed, a range of up to 1 m, and an error of less than 0.01 mm[7]. The residual liquid volume is detected by multiplying the distance moved by the sliding capacitive grid by the cross-sectional area of the container chamber.
2.4 Actuator
The control mechanism used for infusion speed control consists of a stepper motor, a lead screw, a screw nut, a compression bracket , and a container chamber. The stepper motor rotates forward and backward under the control of the FPGA. The rotation of the lead screw causes the nut to move horizontally. The compression bracket is installed on the screw. The compression bracket compresses the container chamber. The liquid medicine bag shrinks due to the smaller volume of the container chamber. The liquid medicine is output from the infusion tube. By adjusting the stepping speed of the stepper motor, the purpose of controlling the infusion speed is achieved.
2.5 Voice Communication
The stereo CODEC chip WM8731 is a high-performance, low-power 24-bit audio stereo interface, which is widely used in various portable music players. The chip can set the sampling rate of the audio ADC and DAC respectively, and contains microphone-in, line-in and line-out interfaces. WM8731 is connected to FPGA via I2C interface.
Voice transmission and reception requires a suitable band, which is 15.6 MHz in this article. Let the software generate a phase-locked loop frequency conversion module. Audio_DAC_ADC.v requires a 15.6 MHz clock, calls the phase-locked loop (PLL) resources on the FPGA, and let the software generate the .v file of this module, and then add this module in de2_top.v.
The process of adding the audio _DAC_ADC module is:
reg signed [15:0] audio_outR;
wire signed [15:0] audio_outL;
wire signed [15:0] audio_inL, audio_inR;
AUDIO_DAC_ADC u2 (//Audio Side
.oAUD_BCK(AUD_BCLK),
.oAUD_DATA(AUD_DACDAT),
.oAUD_LRCK(AUD_DACLRCK),
.oAUD_inL(audio_inL),/audio left data from ADC
.oAUD_inR(audio_inR),//audio right data from ADC
.iAUD_ADCDAT(AUD_ADCDAT),
.iAUD_extL(audio_outL),//audio left data to DAC
iAUD_extR(audio_outR),//audio right data to DAC
// Control Signals
.iCLK_15_6(AUD_CTRL_CLK),
.iRST_N(1′b1));
2.6 LCD display control
The display uses an OLED organic light-emitting display provided by Visionox , with a resolution of 160×128 and 6.5K colors, connected to the FPGA with a 16-bit parallel data bus. The control chip of the OLED is LGDP4216, the OLED power supply voltage is 10 V to 21 V, and the interface power supply voltage is 2.2 V to 3.3 V. The display area size is variable, with a maximum of 160 (RGB) × 128 lines, and there are 7 refresh rates, with the default being 90 Hz.
2.7 RS232 data transmission and alarm
Use MAX3232 level conversion chip and 9-pin D-type connector for serial communication. Since the system is powered by 3.3 V, MAX3232 is needed for level conversion. MAX3232 is a 3.3 V working RS232 conversion chip. The MAX3232 adapter port in the nurse's room is equipped with three LED lights to display the execution status, data transmission, and alarm. The serial port is directly connected to the CyclII FPGA. The MAX3232 chip contains two sets of transceivers with a maximum data transmission rate of 250 kb/s. The alarm function is mainly displayed in the nurse's room and is bound to the transmission module. When the residual liquid control reaches the lower limit, an alarm occurs.
3 Software Design
The main program of infusion control is mainly composed of initialization module and various functional modules, as shown in Figure 5. The initialization module mainly completes the initial state setting of communication, interruption and timing. In the initial state, the RS232 communication port is set to receive state and the baud rate is set to 19200 b/s; the functional modules include keyboard control, drip speed detection, stepper motor control, data display, voice communication and alarm.
This system has widely absorbed the advantages of similar systems, and the test methods and control methods adopted are safe, convenient, energy-saving and reliable. This system is developed using Cycl-one II FPGA. Its keyboard operation is convenient and fast, the LCD display is clear at a glance, and the voice communication and alarm functions improve the sense of security of medical staff and patients. This system makes full use of keyboard PIO, LCD display, ADC and DAC audio interface, RS232 serial communication port, etc., shortening the system development cycle and reducing the system development cost. Through experimental testing, the system's various detection sensors , control actuators, displays, alarms and other functions are normal, and the performance meets the design requirements.
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Recommended ReadingLatest update time:2024-11-17 03:39
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