The voltage space vector pulse width modulation wave is generated by the DSP chip

1 Introduction
　　
　　In electrical transmission, pulse width modulation (PWM-Pulse Width Modulation) control technology is widely used. As the requirements for the control performance of electrical transmission systems continue to increase, people have conducted in-depth research on PWM control technology: from the initial pursuit of sinusoidal voltage waveforms, to sinusoidal current waveforms, and then to sinusoidal magnetic flux, PWM control technology continues to innovate and improve. . The voltage space vector (SVPWM-Space Vector PWM) used in this article is an optimized PWM method, which can significantly reduce the harmonic components of the inverter output current and the harmonic losses of the motor, and reduce the pulsating torque. Due to its control Simple and easy to realize digitally, there is a trend to replace traditional SPWM (SinusoidalPWM). The continuous development of microcomputer technology makes digital PWM possible and has broad application prospects. This article uses the TMS320F240 in the TMS320C24x series of digital signal processors (DPS) launched by Texas Instruments (TI) specifically for motor control to implement SVPWM frequency conversion speed regulation ^{[1, 2]} . This article introduces two methods to implement SVPWM by TMS320F240. One is implemented using the conventional comparison function of TMS320F240. It is called SWSVPWM (software SVPWM); the other is implemented using the inherent hardware circuit of TMS320F240 to generate SVPWM, called HWSVWM (hardware SVPWM) ^[3] .

2 Basic principles and characteristics of SVPWM
　　The voltage space vector method (SVPWM, called flux sinusoidal PWM) starts from the perspective of the motor and focuses on making the motor obtain a circular magnetic field with constant amplitude, that is, sinusoidal flux. It uses the ideal circular flux trajectory of the AC motor when powered by three-phase symmetrical sine wave voltage as the benchmark, and uses the actual magnetic flux generated by the different switching modes of the inverter to approximate the benchmark flux circle, thereby achieving higher control performance. The switching states of the upper and lower arms of the three-phase voltage source inverter bridge are complementary. Therefore, the switching states of the power devices of the three upper arms can be used to describe the working state of the inverter. The switching state of the power device is recorded as "1" , the off state is "0", then there are 8 combinations of switch states of the upper arm, which can be represented by the vector [a, b, c] ^t , respectively [0 0 0] ^t , [0 0 1] ^t ,... , [1 1 1] ^t . 　　After obtaining the phase voltage vector, then apply the unified theory of motor and abc-dq coordinate conversion: the 　　8 switching state vectors of abc coordinates can be converted into 8 voltage vectors of dq coordinates, which are recorded as U ₀ , U ₆₀ , U ₁₂₀ , respectively. U ₁₈₀ , U ₂₄₀ , U ₃₀₀ , U ₀₀₀ , U ₁₁₁ are called basic voltage space vectors, among which U ₀₀₀ and U ₁₁₁ are zero vectors, as shown in Figure 1.　　

　　The goal of SVPWM control technology is to control the space voltage vector U _out to make a circular rotation according to the set parameters by controlling the switch state combination. At a certain moment, U _out rotates in a certain area, and the required U _{out output can be obtained by combining the two non-zero vectors U x} that make up this area according to the corresponding action times T ₁ and T ₂ respectively . In the process of rotating from one space voltage vector to another vector, the principle of minimal change in the switching state of the power device should be followed, that is, only the switching state of one power device should change. Based on this principle, the rotation direction between the basic space voltage vectors can be selected. The U _x that acts first is called the main vector, and the U x that acts later is called the auxiliary vector. So U _out can be expressed as 　　Since the sum of T ₁ and T ₂ is less than T _P and the sum is less than T _P (carrier period), it is necessary to use zero vector U _{0 0 0} or U _{1 1 1} to insert, and the insertion time is T ₀ , T ₁ +T ₂ +T ₀ =T _P ​​. The zero vector has no effect on the size of U _out and only compensates for the set frequency. At a very high switching frequency, U _out can be regarded as a constant in each conversion cycle, and the above formula can be written as: Using this formula, T


₁ and T ₂
can be obtained respectively in the dq plane . The size of 　　the voltage space vector U _out represents the effective value of the three-phase motor line voltage, and its frequency is also the frequency of the three-phase motor. Controlling the size, rotation speed and direction of U _out can achieve variable frequency speed regulation. The inscribed circle of the hexagon consisting of the basic voltage space vector shown in Figure 1 is the maximum trajectory that U _out can reach, so the maximum value of U _out is the line voltage and phase voltage of the corresponding motor and V _dc / , which It is times the maximum value of ordinary SPWM , so the DC voltage utilization rate of SVPWM is also the highest ^[4] .


3 Generate SVPWM based on TMS320F240
　　TMS320F24x is a DSP chip newly developed by American TI company specifically for motor control. In addition to the inherent high-speed computing characteristics of DSP (50ns instruction cycle) and hardware multiplier, it also internally integrates three-phase PWM waveforms. Generator, the combination of the two allows us to generate SVPWM waves of any frequency through real-time calculations. 　　The TMS320C24x series products design a special PWM generation circuit for motor control, as shown in Figure 2. 　　From the hardware structure of on-chip PWM generation in Figure 2, we can see that PWM generation is controlled by specific registers:　　

　　

　　

　　(1) COMCON[12] controls whether the PWM output is the conventional comparison control PWM mode (SWSVPWM) or the hardware SVPWM mode (HWSVPWM).
　　(2) ACTR [12-15] is the current vector, and the corresponding value is written according to the position of U _out
. It is used when HWSVPWM is used. 　　(3) T1CON [11-13] controls the generation of symmetrical or asymmetrical PWM waveforms. The dead time is set to DBTCON. When the clock is 50ns, the set dead time range is 0~102.4μs.
　　(4) COMCON controls PWM output or high-impedance output, which can be used for timely protection when the system fails.
　　(5) The three comparison registers of CMPRx (x=1, 2, 3) respectively correspond to when to turn on the three phases a, b, and c. The size of their values ​​is determined by the action time of the main, auxiliary vector and zero vector. When SWSVPWM is used use.

3.1 SWSVPWM generation method

　　The process of using software to generate SVPWM is that when the timer counter accumulates to a value equal to CMPRx = 1, 2, 3), the control signal output corresponding to the space vector will be changed. For example, write 0.25T ₀ in CMPR1 , 0.25T ₀ +0.5T _{1 in CMPR2, and write 0.25T 0} +0.5T ₁ +0.5T ₂ in CMPR3 . The counter value of the timer will be the same as CMPRx one by one. If matched, the PWM waveform shown in Figure 3a will be output. Therefore, the task to be completed by the program that generates SVPWM - the timer interrupt subroutine is already very clear. In the main program, calculate the required frequency according to the control strategy and wait for the interrupt to occur. In the timer interrupt subroutine, determine the position of U _out in the next carrier cycle based on the current position of f and U _out at this time , determine the main vector and auxiliary vector, and calculate their respective times T ₁ and T _2. Get the time value when allocation occurs and write it into CMPRx. As shown in Figure 3, the main vector in area I is U ₀ and the auxiliary vector is U _±60 . The main vector in area II is U ₁₂₀ and the auxiliary vector is U ₆₀ , and so on in other areas.

3.2 HWSVPWM generation method
　　
　　In each PWM cycle, the action will be completed: at the beginning of the cycle, the PWM output is set according to the vector defined in ACTR [14-12]; in the upward counting process, at 0.5T ₁ time When the first comparison match occurs (the counter value is equal to the CMPR1 value), the PWM output is converted into an auxiliary vector according to the rotation direction defined by ACTR [15] (0 means counterclockwise rotation, 1 means clockwise rotation), and at 0 .5T ₁ + 0.5T ₂ moment, when the second comparison match occurs (the counter value is equal to the CMPR2 value), the PWM output is converted into one of two zero vectors; during the downward counting process, with Symmetrical output in the first half of the cycle. Figure 4 shows the SVPWM waveforms in Area I and Area II, and the analogy can be applied to other areas.

3.3 Comparison of SWSVPWM and HWSVPWM
　　
　　It can be seen from the analysis that in each PWM cycle, the SWSVPWM waveform starts and ends with the zero vector U ₀₀₀ , and the state of each inverter bridge arm changes, so the three-phase voltage remains after adding the dead zone. Balance does not affect the inverter line voltage; and the HWSVPWM waveform starts with the vector set in ACTR [14-12] and ends with it. There is a bridge arm state that never changes, and the number of switches is reduced, thereby reducing In addition to the switching loss, the dead zone only affects the two bridge arms, so it causes harmonic components in the line voltage waveform. When the switching frequency is high (such as 20kHz) and the dead time is small, the harmonic components are smaller. In addition, HWSVPWM requires less calculation and takes up less CPU time. Table 1 is a comparison of HWSVPWM and SWSVPWM.

4 Experimental analysis
　　
　　The TMS320F240 chip is used, plus the necessary peripheral circuits, to form a minimum DSP system. The intelligent power module uses Siemens' P221, with a maximum switching frequency of up to 20kHz and a dead time of only 2μs. Together with the incoming line filtering and rectification circuits, a simple and practical variable frequency speed regulation system can be made. The experimental motor is a 750W three-phase squirrel cage motor, a 100W three-phase wound motor, and the load is a 180W shunt DC generator with a sliding wire rheostat. The experiment uses the SWSVPWM method and compares it with the ordinary SPWM method.
　　
　　The experimental results are shown in Figures 5, 6, and 7. From the experimentally observed output voltage waveform, the current waveform has good sinusoidality; through FFT transformation, it is found that the harmonic elimination effect of SVPWM is obvious, especially the 6k±1 harmonic in the 0~ 1. Basically all harmonics in the 22kHz range are eliminated, and their harmonic amplitudes are more than 30dB smaller than the fundamental wave amplitude.

5 Conclusion
　　
　　This article studies the method of implementing SVPWM using DSP chip TMS320F240. After analysis and experiments, the results show that:
　　(1) SVPWM has a high degree of harmonic optimization, is better at eliminating harmonics than SPWM, is easy to implement, and may improve voltage utilization.
　　(2) SVPWM is more suitable for digital control systems. Digital control systems with microcontrollers as the core are the development trend, so SVPWM should be the preferred choice.
　　(3) With TI's TMS320F240 as the core, it constitutes a fully digital control system that can generate SVPWM in two ways. In general small and medium-power frequency conversion speed regulation systems, it is very suitable to use this chip to implement SVPWM control technology.

references:

[1] TMS320C24X DSP Controllers-peripheral Library and Specific Devices〔J〕． 1997,2．
[2] TMS320C24X DSP Controllers－CPU System, and Instruction Set〔J〕． 1997,1．
［3］ Zhenyu Yu． Space－Vector PWM Technique WithTMS320C24x／F24x Using Hardware and Software Determined Switching Patterns［J］． 1999.
[4] Zhenyu Yu, Figoli, David. AC Induction Motor ControlUsing ConstantV／HzPrinciple and Space- Vector PWM Technique With TMS320C240［J］． 1998.