NIOSⅡ is the second generation IP soft core processor launched by Altera. It and other IP cores can form the main part of SOPC system. Altera SOPC Builder provides NiosⅡ processor and some common peripheral interfaces, so users can define and add some modules that are not provided in the library. Users can also add IP cores developed by themselves to SOPC design through custom logic methods. Customizing user logic peripherals is one of the important features of SOPC system using NiosⅡ embedded soft core processor.
This paper proposes a design method for the IP core of LCD controller and matrix keyboard. This method uses the component editor Create New Component in SOPC Builder to add the self-developed LCD display module and keyboard IP core to the SOPC design through a custom logic method. The controller has an Avalon bus interface and can be used with other standard IP cores to form a system-on-chip with NiosⅡ as the core, and the driver can be written.
1 Hardware design of keyboard and display circuit
The keyboard adopts a 4×4 row-column keyboard, and its 4 row input lines KEY0~KEY3 and 4 column output lines KEYSCAN0~KEYSCAN3 are connected to the keyboard interface circuit. Each row signal line is connected to the 3.3 V power supply using a pull-up resistor. The LCD display uses the THSl2864-12 display module. HSl2864-12 is a graphic dot matrix LCD display with a 128×64 dot matrix, which can display 4 lines and 8 Chinese characters per line. The module has a 2MB Chinese font ROM, which can provide 8192 16×16 dot matrix Chinese fonts. At the same time, in order to facilitate the display of English and other commonly used characters, it also has a 16 KB half-width font ROM, providing 128 16×8 dot alphabetic symbol fonts; in addition, the drawing display screen can also provide a 64×256 dot drawing area (GDRAM) and 240 dots of ICONRAM, which can be mixed with text and pictures. The CGRAM contained in it can provide 4 sets of software-programmable 16×16 dot character creation functions. Its keyboard circuit and display module interface circuit are shown in Figure 1.
2 Keyboard scanning circuit programming
The row-column keyboard is also called the matrix keyboard. It uses lines with I/O ports to form a row-column structure, and the keys are set at the intersection of the rows and columns. Most traditional matrix keyboards use software driver control, that is, the keyboard status is cyclically scanned and queried in the program to determine whether a key is pressed. This method consumes CPU resources and the query scanning results may have errors. This paper proposes a new method to implement matrix keyboard control in FPGA using hardware description language. This method uses a timing circuit to scan and query the keyboard. When a key is found to be pressed, the corresponding key code and interrupt signal can be given, and the key is processed in an interrupt manner. The matrix keyboard scan is divided into 4 timings. In each timing, the KEY0~KEY3 (four row lines) ports output 1110, 1101, 1011, and 0111 scan codes respectively, and control a column of keys to be grounded respectively. At the same time, the KEYSCAN0~KEYSCAN3 (four column lines) ports are queried in each timing.
FIG2 shows a keyboard scanning circuit with a 4×4 row and column structure, which is composed of a frequency divider circuit, a keyboard scanning counting circuit, a keyboard row (row) and column (col) key detection circuit, a key jitter elimination circuit, a keyboard encoding circuit, etc.
After designing the keyboard hardware control program, the keyboard control program can be encapsulated as a user-defined peripheral component with configurable parameters, so that it can be directly added and used in SOPCBuilder. After completing the addition of the KEYS device, the KEYS device will appear under the "User Logic" project in the component selection column of SOPCBuilder. Finally, design the driver of the matrix keyboard in NiosⅡIDE, install the keyboard key interrupt, and write the key interrupt service program to obtain the keyboard code of the corresponding key through the key interrupt. The routine is as follows:
/*Initialize keyboard interrupt*/
3 LCD display module programming
In the interface between NiosⅡ and LCD, on the one hand, the indirect control of the LCD can be achieved by adding the corresponding I/O port in the NiosⅡ system, and on the other hand, it can be directly controlled by building an IP core. The first is to operate the LCD interface as a common external device PIO, and the LCD data, read and write enable, chip select signals, etc. are all included in the PIO bus; the second is to define the entity in SOPC Builder, and regard the LCD display module as an external memory, and directly make it an Avalon bus Slave device.
The first method requires designing I/O interfaces connected to peripherals in hardware engineering, while in software engineering, users need to write corresponding interface programs to initialize peripherals and set corresponding peripheral registers. This work has to be repeated every time a new project is created, which will increase development costs. The second solution requires writing HDL modules and defining control states, data registers, and control bits by yourself. This method is flexible and easy to implement complex control timing. Once the customized device is successful, you can use these devices like other devices. Users can also share these devices with other users, which greatly reduces duplication of work. The second method is used in this design.
Double-click Create New Component in Altera SOPC Builder to open the Component window, and add the file written in LCD hardware description language under the HDL Files tab (the file describes the interface between the component and the Avalon bus and the interface between the component and the LCD screen). The system editor will automatically analyze the file and read the I/O signal and parameter information from the file. The LCD 12864 custom logic signal is shown in Figure 3.
After adding the LCD_12864 device, it will appear under the "User Logic" item in the component selection column of SOPC Builder. Figure 4 shows the pin assignment diagram of the LCD module.
The initialization of the LCD module is to set the LCD mode. Since the LCDl2864 control module in SOPC Builder has taken into account the LCD read and write timing, it is only necessary to initialize the LCD when using NIOSⅡIDE for LCD driving and control. Some of its initialization subroutines are as follows:
After that, open NiosⅡIDE, create a software project, and write a test program to test and verify the display results of the LCD module. Some of the programs are as follows:
4 Conclusion
Finally, the design was tested and proved that the matrix keyboard key interrupt response was accurate. Since the scanning process is implemented by hardware and does not occupy CPU resources, the system performance can be greatly improved, and the LCD can receive any Chinese and English input display. During the development and design process, the matrix keyboard and LCD interface are encapsulated as user-defined peripheral components and added to the component library of SOPCBuilder, so they can be easily added and used in other systems according to actual conditions. Users can also share these devices with other users, which greatly reduces duplication of work. Compared with other methods, this method is undoubtedly a more efficient, flexible and low-cost development method, and it also reflects the flexible, convenient and reusable advantages of SOPC on-chip programmable systems.
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