1. Introduction to control chips
Autonomous driving chips refer to SoC chips that can achieve high-level autonomous driving. As a general-purpose processor, the CPU is suitable for processing a moderate number of complex operations.
Control chips mainly refer to MCU (Microcontroller Unit), which is a microcontroller, also called a single-chip microcomputer. It appropriately reduces the main frequency and specifications of the CPU, and combines memory, timers, A/D conversion, clocks, and I/O Multiple functional modules and interfaces such as ports and serial communications are integrated on a single chip to realize terminal control functions. It has the advantages of high performance, low power consumption, programmability, and high flexibility.
Schematic diagram of automotive grade MCU
Automobiles are a very important application field for MCUs. According to IC Insights data, the proportion of global MCUs used in automotive electronics in 2019 was approximately 33%. The number of MCUs used in each high-end car is close to 100. From the driving computer and LCD instrument to the engine and chassis, all large and small components in the car require MCU control. In the early days, 8-bit and 16-bit MCUs were mainly used in automobiles. However, as automobile electronics and intelligence continue to strengthen, the quantity and quality of MCUs required are also constantly increasing. Currently, 32-bit MCUs account for about 60% of automotive MCUs. Among them, ARM's Cortex series cores are the mainstream choice of various automotive MCU manufacturers because of their low cost and excellent power consumption control.
The main parameters of automotive MCU include operating voltage, operating frequency, Flash and RAM capacity, timer module and number of channels, ADC module and number of channels, type and number of serial communication interfaces, number of input and output I/O ports, operating temperature, Packaging form and functional safety level, etc.
According to the number of CPU bits, automotive MCUs can be mainly divided into 8-bit, 16-bit and 32-bit. With process upgrades, the cost of 32-bit MCUs continues to drop, and it has now become mainstream, gradually replacing the applications and markets dominated by 8/16-bit MCUs in the past.
If divided by application fields, automotive MCUs can be divided into body domain, power domain, chassis domain, cockpit domain and intelligent driving domain. Among them, for the cockpit domain and intelligent driving domain, the MCU needs to have high computing power and high-speed external communication interfaces, such as CAN FD and Ethernet. The body domain also requires a larger number of external communication interfaces, but The computing power requirements for the MCU are relatively low, while the power domain and chassis domain require higher operating temperatures and functional safety levels.
2. Chassis domain control chip
The chassis domain is related to the driving of the car. It is composed of the transmission system, driving system, steering system and braking system. It is composed of five major subsystems, namely steering, braking, gear shifting, throttle and suspension system. With the intelligentization of automobiles, In the development of smart cars, the perception and identification, decision-making and planning, and control execution of smart cars are the core systems of the chassis domain. Steering by wire and brake by wire are the core components for the execution end of autonomous driving.
(1) Job requirements
The chassis domain ECU adopts a high-performance, scalable functional safety platform and supports sensor clusters and multi-axis inertial sensors. Based on this application scenario, the following requirements are put forward for the chassis domain MCU:
· High main frequency and high computing power requirements, the main frequency is not less than 200MHz and the computing power is not less than 300DMIPS
· Flash storage space is not less than 2MB, with code Flash and data Flash physical partitions;
· RAM should not be less than 512KB;
· High functional safety level requirements, which can reach ASIL-D level;
· Support 12-bit precision ADC;
· Support 32-bit high-precision, high-synchronization timer;
· Support multi-channel CAN-FD;
· Support no less than 100M Ethernet;
· Reliability is not lower than AEC-Q100 Grade1;
·Support online upgrade (OTA);
· Support firmware verification function (national secret algorithm);
(2) Performance requirements
· Kernel part:
I. Core frequency: The clock frequency when the core is working. It is used to indicate the speed of the core digital pulse signal oscillation. The main frequency cannot directly represent the computing speed of the core. The computing speed of the core is also related to the core's pipeline, cache, instruction set, etc.;
II. Computing power: DMIPS can usually be used for evaluation. DMIPS refers to a unit that measures the relative performance of the MCU's comprehensive benchmark program when testing the program.
· Memory parameters:
I. Code memory: memory used to store code;
II. Data memory: memory used to store data;
III.RAM: Memory used to store temporary data and code.
· Communication bus: including automobile-specific bus and conventional communication bus;
· High-precision peripherals;
· Operating temperature;
(3) Industrial pattern
Since the electronic and electrical architecture adopted by different car manufacturers will be different, the demand for components in the chassis domain will be different. Different models of the same car manufacturer will have different ECU selections in the chassis domain due to different high and low configurations. These distinctions will result in different demands for MCUs in the chassis domain. For example, the Honda Accord uses three MCU chips in the chassis domain, and the Audi Q7 uses about 11 MCU chips in the chassis domain. The output of Chinese brand passenger cars in 2021 is about 10 million units, of which the average demand for MCUs in the single-vehicle chassis domain is 5 units, and the total market volume has reached about 50 million units. The main suppliers of MCUs in the entire chassis domain are Infineon, NXP, Renesas, Microchip, TI and ST. These five international semiconductor manufacturers account for more than 99% of the chassis MCU market.
(4) Industry barriers
From a key technical perspective, components in the chassis domain such as EPS, EPB, and ESC are closely related to the driver's life safety. Therefore, the functional safety level requirements for chassis domain MCUs are very high, and they are basically ASIL-D level requirements. There is no MCU with this functional safety level in China. In addition to functional safety level, the application scenarios of chassis domain components have very high requirements on the MCU's main frequency, computing power, memory capacity, peripheral performance, peripheral accuracy, etc. Chassis domain MCUs have formed very high industry barriers, which require domestic MCU manufacturers to challenge and break through.
In terms of supply chain, since the chassis domain components require control chips with high main frequency and high computing power, this puts forward relatively high requirements on the technology and process of wafer production. At present, it seems that at least a 55nm or above process is required to meet the MCU main frequency requirements above 200MHz. In this regard, domestic automotive-grade MCU production lines are not yet complete and have not reached mass production levels. International semiconductor manufacturers have basically adopted the IDM model. In terms of wafer foundries, currently only TSMC, UMC and GlobalFoundries have the corresponding capabilities. Domestic chip manufacturers are all Fabless companies, which pose challenges and certain risks in wafer manufacturing and production capacity assurance.
In core computing scenarios such as autonomous driving, traditional general-purpose CPUs are difficult to adapt to AI computing requirements due to low computing efficiency. AI chips such as GPUs, FPGAs, and ASICs rely on their own characteristics to perform well at the edge and in the cloud, and are widely used. From the perspective of technology trends, GPU will still be dominated by AI chips in the short term, and in the long term, ASIC is the ultimate direction. From the perspective of market trends, the global demand for AI chips will maintain a rapid growth momentum. Both cloud and edge chips have great growth potential. It is expected that the market growth rate will be close to 50% in the next five years. Although the foundation of domestic chip technology is weak, it will continue to grow with the rapid development of AI chip technology. The rapid implementation of AI applications and the rapid increase in demand for AI chips have created opportunities for the growth of local chip companies' technology and capabilities. Autonomous driving has strict requirements on computing power, latency and reliability. Currently, GPU+FPGA solutions are mostly used. As the algorithm becomes more stable and data-driven, ASIC is expected to gain market space.
A lot of space is needed on the CPU chip for branch prediction and optimization, and to save various states to reduce the delay during task switching. This also makes it more suitable for logic control, serial operations and general-type data operations. Take the comparison between GPU and CPU as an example. Compared with CPU, GPU uses a large number of computing units and an ultra-long pipeline, has only very simple control logic and eliminates the need for Cache. The CPU is not only occupied by a large amount of space in the Cache, but also has complex control logic and many optimization circuits. In comparison, the computing power is only a small part.
3. Power domain control chip
The power domain controller is an intelligent powertrain management unit. CAN/FLEXRAY is used to realize transmission management, battery management, and monitor alternator adjustment. It is mainly used for optimization and control of the powertrain. It also has functions such as intelligent electrical fault diagnosis, intelligent power saving, and bus communication.
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