Ten tips for successful designs that comply with automotive EMC/EMI requirements

introduction

The automotive industry and individual vehicle manufacturers must meet a variety of electromagnetic compatibility ( EMC ) requirements. For example, two of the requirements are to ensure that electronic systems do not produce excessive electromagnetic interference ( EMI ) or noise, and that they must be immune to noise generated by other systems. This article explores some of these requirements and describes some tips and methods that can be used to ensure that equipment designs meet these requirements.

Overview of EMC  requirements

CISPR 25 is a standard that proposes several test methods with recommended limits for the evaluation of radiated emissions from a component that is to be installed in a vehicle. [1,2] In addition to the guidance provided to manufacturers by CISPR 25, most manufacturers have their own set of standards that supplement the CISPR 25 guidelines. The main purpose of CISPR 25 testing is to ensure that components about to be installed in a car will not interfere with other systems in the car.

CISPR 25 requires that the electromagnetic noise level in the room in which the test is performed must be at least 6 dB lower than the lowest measured level. Since CISPR 25 has locations where it expects noise levels as low as 18 dB (μV/m), an ambient noise level below 12 dB (μV/m) is required. For reference, this is approximately equivalent to the field strength of a typical AM broadcast station located 1 km away from the antenna. [3]

In today's environment, the only way to meet this requirement is to conduct testing in a special room designed and built to shield the test environment from external electromagnetic fields. In addition, since normal budgets require certain limitations on the size of the test room, it is important to avoid the adverse effects of signal reflections generated within the test room on the test environment. Therefore, the walls of the test chamber must be lined with a material that does not reflect electromagnetic (EM) waves (Figure 1). Test rooms are expensive to build and are usually rented by the hour. To save costs, it is best to evaluate EMC / EMI issues during the design phase   to achieve first-time success in the test chamber.

Another test standard is the ISO 11452-4 Bulk Current Injection (BCI) test series, which verifies whether a component is adversely affected by narrowband electromagnetic fields. The test is performed by inducing the disturbance signal directly into the wiring harness using a current probe.

10 tips for successful EMC testing

1 Keep loops small

When a magnetic field is present, a loop of conductive material acts as an antenna and converts the magnetic field into an electric current that flows around the loop. The intensity of the current is proportional to the area of ​​the closed loop. Therefore, the existence of loops should be avoided as much as possible and the area of ​​the necessary closed area should be kept as small as possible. For example, when there are differential data signals, a loop may exist. A loop is formed between the transmitter and receiver using differential lines.

Figure 1: Typical test chamber with special tapered tiles to block reflections

Another common loop occurs when two subsystems share a circuit, perhaps a display and the engine control circuit (ECU) responsible for driving the display. There is a common ground (GND) line in the car chassis, which is a connection line from the display end and the ECU end of the system to the GND. When a video signal is connected to a monitor that has its own ground wire, it creates a huge loop inside the ground plane. In some cases, such loops are unavoidable. However, by introducing an inductor or ferrite bead in the connection to ground, although the DC loop will still exist, from an RF radiation perspective, the loop is broken.

Additionally, when transmitting signals over twisted pair cable, each pair of differential driver/receivers will form a loop. Typically, because twisted pairs are tightly coupled, the area of ​​the loop is small relative to the cable portion of the link. However, once the signal reaches the circuit board, it should be kept tightly coupled to avoid expanding the loop area.

2 Bypass capacitors are essential

CMOS circuits are very popular, in part because of their high speed and very low power dissipation. An ideal CMOS circuit consumes power only when it changes state and when the node capacitance needs to be charged and discharged. From a power supply perspective, a CMOS circuit with an average current consumption of 10 mA may draw many times more current during clock transitions, while drawing very low or even zero current between clock transition cycles. Radiation limiting methods therefore focus on peak values ​​of voltage and current rather than average values.

The current surge from the power supply to the chip power pins during the clock conversion process is a major source of radiation. By placing a bypass capacitor close to each power pin, the current required to power the chip during clock pulse edges is supplied directly from that capacitor. The charge on this capacitor then builds up with a lower, more stable current between clock transition cycles. Larger capacitors are suitable for providing surges in current, but are less responsive to high-speed requirements. Very small capacitors are able to respond quickly to demand, but their total charge capacity is limited and becomes depleted quickly. For most circuits, the best solution is to mix different sized capacitors in parallel (perhaps a combination of 1µF and 0.01µF capacitors). Place smaller capacitors very close to the power pins of the device, while larger capacitors can be placed further away from the power pins.

3 Good impedance matching minimizes  EMI

When a high-speed signal is transmitted through a transmission line and encounters a change in characteristic impedance on the transmission line, part of the signal will be reflected back to the signal source, and part of the signal will continue to be transmitted along the original direction. Reflection will result in radiation, that doesn't change. To achieve low EMI, proper high-speed design practices must be followed. There are a number of excellent resources that provide you with information about transmission line design. [4,5] Here are some recommended precautions when designing transmission lines:

Remember, there is a signal between the ground plane and the signal trace. Radiation can be caused by interruptions in signal traces or ground planes, so be aware of ground plane cuts or interruptions beneath signal traces.

· Try to avoid sharp angles in the layout of signal traces. A nicely curved corner is much better than a right-angle turn.

· Typically, FPD-Link signals will have components tapping them; for example: coax feeds, power connections, AC coupling capacitors, etc. To minimize reflections on these components, try using smaller components such as 0402 form factors and make the trace widths the same as the width of the 0402 component pads. Also, be sure to set the trace's characteristic impedance by controlling the dielectric thickness in the stackup.

4 shield

Good shielding methods should be used, there are no shortcuts at this point. When designing to minimize radiation, shielding needs to be implemented around the portion of the circuit that is causing the problem. While it's still possible to radiate energy, good shielding is able to capture the radiation and send it to ground before they escape from the system. Figure 2 shows how shielding controls EMI.

Shielding can take many forms. It might be as simple as enclosing a system in a conductive enclosure, or it might be as small, precision-machined, custom-made metal enclosures welded over the radiation source.

Figure 2: Shielding example

5 short ground wires

All current that flows into a chip will flow out of that chip again. Several tips introduced in this article all talk about the fact that the connection line to the chip must be short, for example: the bypass capacitor should be close to the IC, the loop should be kept small, etc. However, the path that ground current must take to return to its source is often forgotten. In an ideal world, one layer of the board is dedicated to ground, and the path to GND is no longer than a via. However, some board layouts have cutouts in the ground plane, thus forcing ground current to take a long path from the chip back to the power supply. When GND current travels through this path, it acts as an antenna that sends or receives noise.

6 Do not go faster than required

There is a tendency in the industry to worry about timing margins and use the fastest possible logic devices to provide the best timing margins. Unfortunately, very fast logic devices with steep pulse edges and very high frequency content tend to generate EMI. One way to reduce the amount of EMI in a system is to use logic devices that are as slow as possible but will still meet timing requirements. Many FPGAs allow the drive strength to be set to a lower level as a way to reduce edge rates. In some cases, series resistors on logic lines can be used to reduce the signal slew rate in the system.

7 Power Line Inductor

In the second tip we discussed that bypass capacitors can be used as a means of reducing the effects of current surges. Inductors on power lines are another aspect of the same problem. By routing an inductor or ferrite bead on the power supply line, you force the circuit connected to that power supply to meet its dynamic power needs from the capacitor instead of all the way from the power supply.

8 Place capacitors on the input of the switching power supply

When looking to solve EMI problems, a recurring theme is reducing dv/dt and/or di/dt where possible. At this point, a DC/DC converter may seem completely harmless until one realizes that it does not convert directly from DC to DC, but from DC to AC and back to DC. Therefore, AC in the intermediate stage of conversion may cause EMI problems.