Crosstalk between parallel and intersecting ground planes

The grid method of power and ground shown in Figure 5.10 saves the area of ​​the printed circuit board, but at the cost of increased mutual inductance. This method does not require a separate power ground layer, and you can connect ordinary signals on the same layer as connecting power and ground. This method is suitable for small-scale low-speed CMOS and ordinary TTL circuit designs, but it cannot provide sufficient grounding for high-speed logic circuits.

In the ground plane grid design, the ground lines are distributed horizontally on the bottom layer of the board, while the power lines are distributed vertically on the top layer of the board. At each intersection of the connecting lines, a bypass capacitor is used to connect the two lines, thus forming a parallel crossing pattern. The current returns to the source end in parallel along the ground or power wiring.

The bypass capacitors used in this system must be very good because some of the return current must pass through multiple bypass capacitors on its way to the driver gate.

The open pattern of power and ground routing leaves plenty of space for other signals on the power and ground layers. After completing the power and ground connections, the horizontal routing channels on the ground layer and the vertical routing channels on the power layer on the board are still retained. This is a good method if a double-layer board must be used.

Another related layout model is called parallel crossing ground planes.

This wiring model is completely on one layer, and the lines covered on the board include horizontal and vertical traces. The parallel crossing ground plane is only connected to the ground, and no other signals are routed on this layer.

Parallel, intersecting ground planes help achieve impedance transmission structures on a thin board. Sometimes the width required to achieve satisfactory impedance on a thin dielectric is too narrow to be reliably manufactured.

In this case, the formation can adopt the parallel cross ground plane model, increase the series inductance, reduce the bypass capacitance, and thus improve the characteristic impedance of the line. Unless the line is facing the cross direction at 45 degrees, do not try to control the line impedance on the parallel cross ground plane. This method is only effective when the parallel line is much smaller than the length of the rising edge.

The grids of power and ground and the parallel, crossed ground plane layouts all introduce a lot of mutual inductance between traces compared to a full ground plane. The question is, with such a lot of mutual inductance, can the circuit still work properly?

First let's estimate the self-inductance of a single trace crossing a pair of parallel crossing ground planes. This estimate also applies to a power and ground grid layout.

Where, L = inductance, NH
X = parallel line width, IN
W = trace width, IN
Y = trace length, IN

If the trace is close to a parallel crossing line, the inductance is slightly less, and if the parallel crossing pattern and trace width are close to or less than the line width, there is almost no effect.

If the second trace is very close to the first trace and runs between the same parallel crossing lines, the two traces will be tightly coupled, and the coupling inductance LM between the second trace and the first trace is the same as L in the above formula.

If the second trace is offset by the appropriate distance D, the mutual inductance with the first trace will be reduced, and the denominator and formula are similar, but the parallel cross-line dimension X is used instead of the H term.

Using the calculation formula for " Crosstalk in a Slotted Ground Plane ", the rise time and crosstalk voltage caused by self-inductance and mutual inductance can be calculated.