Performance Testing of the MAX9247/MAX9218 Serializer/Deserializer Chipset

introduction

The MAX9217 /MAX9218 chipset[1] is a transceiver pair. The transmitter (MAX9217) converts parallel data into serial data and sends it to the receiver (MAX9218). The receiver converts the serial data into parallel data. The chipset is designed to transmit video and control signals from a graphics controller (processor) to an LCD or plasma flat panel display over a pair of low-cost twisted-pair cables (such as the UTP-CAT5 cables commonly used in Ethernet). Transmission distances can exceed 10 meters. The chipset has a simple link structure and uses low-cost transmission lines, making it an ideal solution for video displays in automobiles, instruments, medical equipment, etc.

The chipset can not only transmit video signals between two points, but sometimes people also want to transmit audio signals at the same time. In this application note, we will discuss how to use the blanking period of the video signal to transmit audio data to the display through the control signal channel. We will also explain how to convert digital audio data into analog audio signals and give a system architecture for driving speakers on the display panel.

MAX9217/MAX9218 Link Functionality and Video Data Format

The MAX9217 serializer has a 27-bit parallel input and a bus rate of up to 35Mbps. Of these 27 bits, 18 bits are video RGB data: 6 bits for each of the 3 primary colors, and the remaining 9 bits are control signals. The first 3 of the 9 control bits are specified as vertical, horizontal, and RGB data synchronization: VSYNC (C0), HSYNC (C1), and ENAB (C2). The remaining 6 control bits (C3 to C8) are used for other control signals. In this example, we use a portion of the 6 control bits to transmit audio data. The MAX9217 can convert 18-bit RGB data or 9-bit control data into serial data and then transmit it over the LVDS link. The control data is sent during the blanking period of the video display, indicated by the RGB data enable signal (ENAB).

After the MAX9218 receives the serial data, it converts it into parallel data with the same format as the MAX9217 input. Similarly, when the MAX9218 outputs parallel data, the bus clock is regenerated according to the timing of the serial LVDS link. Figure 1 shows the block diagram of the video and control data link setup and connection between the MAX9217 and MAX9218. Figure 2 shows the timing of the video data and control data. The control duty cycle of the RGB data is between 1% and 5%, depending on the video format, display resolution, and link rate.


Figure 1. Video link setup for the MAX9217/MAX9218


Figure 2. Video data and control data format for the serial link

Digital audio data types and transmission formats

Digital audio data comes in many different formats. We discuss the three most common formats: sampled digital audio (PCM), MPEG Layer 3 audio (MP3) [2], and ATSC digital audio compression standard (AC3) [3].

PCM digital audio is the data format used by CD ROMs or DVDs. The left and right audio channels are sampled to obtain PCM digital signals at a sampling rate of 44.1kHz and a precision of 16 or 32 bits. Therefore, when the precision is 16 bits, the PCM audio data rate is 1.41Mbps; when the precision is 32 bits, it is 2.42Mbps. A 700MB CD can store about 60 minutes of music in the 16-bit PCM data format.

MP3 is the audio format used by MP3 players, which compresses and encodes PCM audio data. The stereo MP3 data rate is 112kbps to 128kbps. At this data rate, the decoded MP3 sound quality is the same as CD digital audio. AC3 is a digital audio coding standard for digital TV, HDTV, and movies. The data rate of stereo AC3 after encoding is 192kbps.

To recover the audio signal, the encoded audio data can be fed into an audio decoder chip, which generates PCM digital data that is fed into an audio DAC and eventually recovered into an analog audio signal. Conversely, unencoded digital audio data can be fed directly into an audio DAC. (This type of system implementation is described in detail below.)

A common serial audio digital interface for encoding or decoding audio data is the Inter-IC Sound Bus (I²S) [4]. Figure 3 shows the I²S interface configuration and timing diagram. The boundary of each audio word is marked by the signal WS. Configuration mode 1 is used in our application. Data is latched into the receiver on the rising edge of the SCK signal, but no data is received when SCK is held low.


Figure 3. I²S Interface Configuration and Timing

Using the serial link between the MAX9217 and MAX9218 to emulate the I²S interface, audio data can be transmitted from the graphics controller to the remote end. We assign control bits C3 and C4 to the SD and WS signals, respectively. For the SCK clock, if PCM digital audio is to be sent, the pixel clock PCLK_OUT recovered by the MAX9218 can be used directly. For transmitting MP3 or AC3 audio, control bit C5 can be used to generate a pixel clock with half or lower rate for the SCK clock. Figure 4 shows the timing waveforms for these two cases. To prevent the receiver from overflowing, most I²S interfaces require throttling control. When sending data continuously, SCK can be set low to directly implement throttling control. In Case 1 in Figure 4, the SCK signal cannot be set low during operation, and the chip select pin /CS can be used to shut down the receiver. In this case, Case 1 in Figure 4 assigns C6 to the /CS signal.


Figure 4. Control data bit waveform of the I²S interface

Blanking ratio and audio data throughput rate

Since audio data is transmitted through the blanking period of the video signal, we need to determine the horizontal blanking ratio and the vertical blanking ratio for a given pixel frequency f _{P. Figure 5 shows the horizontal blanking and the vertical blanking period on the display panel.}


Figure 5. Vertical Blanking Let _RL

represent the horizontal blanking ratio and RF represent the vertical blanking ratio. As shown in Figure 5, we can calculate these ratios as follows:

RL = (I _{1 +} I ₂ ) / L and RF ₌ (f ₁ + f ₂ ) / F. The audio data throughput RA is obtained as _follows : RA = (RF _δ F ₊ (1 - RF ₎ RL _δ L ₎ f _P. Where δF and δL are the utilization rates of audio data transmission in the blanking period. The utilization rate refers to the proportion of audio data transmission in the entire blanking period, which is the result of throttling control. As an example, the parameters shown in Table 1 set the data rate for three types of audio data. Table 1. Blanking parameter settings for different types of audio data

Audio Data Type	f P	R A	R B	F	L	Data Rate
16-Bit PCM Audio Data	35	0.02	0.03	81%	82%	1.41Mbps
MP3	17.5	0.01	0.01	35%	38.5%	128Kbps*
AC3	17.5	0.01	0.01	50.3%	60%	192Kbps*

System Implementation

To play audio signals on the panel side, we need to send PCM data to the audio DAC or decode MP3 and AC3 data and then send it to the audio DAC. Since there is no reverse channel to send the handshake signal back to the controller, the decoder host clock must be synchronized with the pixel clock to prevent data overflow or underflow. Figure 6 shows the system block diagram of audio playback of encoded and unencoded data. Figure 6.


Panel-side audio playback implementation

In the above block diagram, three I²S interfaces are used. Starting from the left, the first and second I²S interfaces have the same data rate and can reach 35MHz. The third interface - the MAX9850 DirectDrive headphone amplifier [5] interface, has a fixed rate that is a multiple of the audio sampling rate. The clock SCK2 is fed into the MAX9491 multi-channel clock generator [6], which generates the synchronization clock for the decoder, FIFO, and MAX9850. The MAX9491 provides two programmable PLLs with OTP, which is an ideal frequency synthesizer for this application. Case 1 is suitable for the graphics controller that provides decoded PCM audio data, and Case 2 is used for decoding compressed data on the panel side. The throttling control in Case 1 is implemented by the /CS pin, and in Case 2 it is implemented by the idle SCK clock. Comparing the two implementations, we can see that Case 1 of PCM audio data does not require too much blanking time (Table 1), does not require the use of an audio decoder chip, and has a lower cost than Case 2. Therefore, if the graphics controller can generate PCM data from an encoded audio data stream such as MP3 or AC3, it is recommended to transmit this data directly on the link.