Minimizing Shutdown Current in the MAX9877 Audio Subsystem IC

introduction

In any typical application, it is expected that the SDA data line and SCL clock line of the devices connected to the I²C bus output logic-high levels in the idle state. The MAX9877 audio subsystem IC meets this requirement. The SDA and SCL lines are kept high to obtain the minimum shutdown supply current. This application note describes three methods to obtain the minimum shutdown current when the MAX9877 is in shutdown state and SDA and SCL may be set to logic-low levels.

Method 1 - Adding a weak pull-up

The first approach is to add additional weak pullup resistors to SDA and SCL to establish the voltage on the bus when the normal pullup resistors are ineffective. Figure 1 shows the schematic of this approach.


Figure 1. Weak pullup resistors set the voltage on the SDA data line and the SCL clock line; blocking diodes prevent current loss when the pullup voltages are forced to ground.

A pair of 2MΩ resistors on the SDA and SCL lines divide the battery voltage so that the voltage on the SDA and SCL lines does not exceed the maximum voltage that the I²C master can withstand. The battery voltage range is 4.2V to 3.2V, so the voltage on the SDA and SCL lines is set between 2.1V and 1.6V, which is enough to support the MAX9877 input high voltage. The diode can consume current from the

disabled VDDIO supply when the VDDIO output is forced to ground. If the power supply has a high-impedance output when disabled, the diode can be omitted.

This approach also assumes that the output of the I²C master and all other devices on the bus are high-impedance when powered down. There is one reason why this assumption may not be true: if the power supply to the I²C master is lost, the outputs are clamped to 0 V by the integrated ESD protection. This situation is not common, but if it occurs, SDA and SCL must be pulled high using method 2 or method 3.

Method 2 - Level Shifter

If the other devices on the bus cannot be assured of being placed in a high-impedance state when the system interface is powered down, a single n-channel enhancement-mode MOSFET can be used to isolate each bus from the rest of the system. Additional pullup resistors can be added on the MAX9877 side of the bus to set the logic level high.

Figure 2 shows a circuit to implement this scheme. VDDIO is the system's I²C pullup voltage, and all four resistors must be selected based on the system's I²C timing requirements. The n-channel MOSFET acts as a bidirectional level shifter, allowing the MAX9877 and baseband logic levels to differ without affecting normal operation. The level shifter allows the MAX9877's SDA and SCL pins to remain high when the VDDIO supply is disabled, thereby reducing shutdown current.


Figure 2. Adding n-channel MOSFET level shifters to isolate system buses

Method 3 - High-Side Power Switch

A final method for reducing the shutdown current of the MAX9877 is to place a high-side switch in series with the MAX9877 supply. This allows the supply to be completely disconnected from the battery when necessary and reduces the shutdown current of the MAX9877 to less than 1µA.

Figure 3 shows the connection of the high-side switch to the MAX9877. The MAX9877 has two supply pins (VDD and PVDD) that must be kept within 0.3V of each other. Using a power switch keeps both supply voltages the same and reduces component count.


Figure 3. A high-side power switch in series with the MAX9877 supply completely eliminates the shutdown current.